DDR Termination Regulator
ELECTRICAL CHARACTERISTICS
(1)
TJ2997
(1), (2), (3)
Specifications with standard typeface are for T
J
= 25˚. Unless otherwise specified, AVIN = 2.5V, PVIN = VDDQ = 1.8V
(1), (2), (3)
DDRⅡ. AVIN = 2.5V, PVIN = VDDQ = 1.5V
for DDR
Ⅲ.
for
PARAMETER
V
REF
Voltage
V
REF
Voltage
SYMBOL
V
REF
V
REF
TEST CONDITION
V
DDQ
= 1.8V
V
DDQ
= 1.5V
I
OUT
= 0 A
V
DDQ
= 1.8V, PVIN = 1.8V
I
OUT
=
±
0.9 A
V
DDQ
= 1.8V, PVIN = 1.8V
I
OUT
= 0 A
@ V
DDQ
= 1.5V, PVIN = 1.5V
I
OUT
= ± 0.5 A
(6)
@ V
DDQ
= 1.5V, PVIN = 1.5V
(6)
I
OUT
= ± 0.9A
@ V
DDQ
= 1.5V, PVIN = 1.8V
I
OUT
= 0 A
I
OUT
=
±
0.5 A
I
OUT
=
±
0.9 A
(6)
(6)
(6)
MIN.
0.882
0.735
0.86
0.86
0.71
0.71
0.71
-25
-25
-25
-
-
TYP.
0.90
0.75
0.90
0.90
0.75
0.75
0.75
0
0
0
250
100
150
0.1
MAX.
0.918
0.765
0.94
0.94
0.79
0.79
0.79
25
25
25
500
-
300
0.5
-
0.6
10
0.1
-
UNIT
V
V
V
TT
Output Voltage
V
TT
V
V
TT
Output Voltage
V
TT
V
V
TT
Output Voltage Offset
Quiescent Current
(4)
V
DDQ
Input Impedance
Quiescent Current in Shutdown
(4)
Shutdown Leakage Current
Minimum Enable High Level
Maximum Enable Low Level
V
TT
Leakage Current in Shutdown
V
SENSE
Input Current
Thermal Shutdown
(5)
V
OSVTT
I
Q
Z
VDDQ
I
SD
I
Q_SD
V
IH
V
IL
I
V
I
SENSE
T
SD
mV
(if applicable)
I
OUT
= 0A
uA
kΩ
uA
uA
V
V
uA
uA
℃
EN = 0V
EN = 0V
1.9
(7)
-
EN= 0V,
V
TT
= 1.25V
-
-
-
-
1
-
165
Note 1. Absolute maximum ratings indicate limits beyond which damage to the device may occur. Operating range indicates conditions
for which the device is intended to be functional, but does not guarantee specific performance limits. For guaranteed
specifications and test conditions see Electrical Characteristics. The guaranteed specifications apply only for the test conditions
listed. Some performance characteristics may degrade when the device is not operated under the listed test conditions.
Note 2. At elevated temperatures, devices must be derated based on thermal resistance. The device in the SOP8 package must be
derated at
θ
JA
= 165˚ C/W junction to ambient with no heat sink.
Note 3. Limits are 100% production tested at 25˚C. Limits over the operating temperature range are guaranteed through correlation.
Note 4. Quiescent current defined as the current flow into AV
IN
.
Note 5. The maximum allowable power dissipation is a function of the maximum junction temperature, T
J(MAX),
the junction to ambient
thermal resistance,
θ
JA
, and the ambient temperature, T
A
. Exceeding the maximum allowable power dissipation will cause
excessive die temperature and the regulator will go into thermal shutdown.
Note 6. V
TT
load regulation is tested by using a 10 ms current pulse and measuring V
TT
.
Note 7. In the case of AV
IN
> 2.5V, minimum enable high level is AV
IN
* 0.7.
Apr, 2011 - R1.0.1
3/13
HTC
HTC [ HTC KOREA TAEJIN TECHNOLOGY CO. ]
