DDR Termination Regulator
TJ2996
V
DDQ
V
DDQ
is the input used to create the internal reference voltage for regulating V
TT
. The reference
voltage is generated from a resistor divider of two internal 50kΩ resistors. This guarantees that V
TT
will
track V
DDQ
/ 2 precisely. The optimal implementation of V
DDQ
is as a remote sense. This can be
achieved by connecting V
DDQ
directly to the 2.5V rail at the DIMM instead of AV
IN
and PV
IN
. This
ensures that the reference voltage tracks the DDR memory rails precisely without a large voltage drop
from the power lines. For SSTL-2 applications V
DDQ
will be a 2.5V signal, which will create a 1.25V
termination voltage at V
TT
(See Electrical Characteristics Table for exact values of V
TT
over
temperature)
V
SENSE
The purpose of the sense pin is to provide improved remote load regulation. In most motherboard
applications the termination resistors will connect to V
TT
in a long plane. If the output voltage was
regulated only at the output of the TJ2996 then the long trace will cause a significant IR drop resulting in
a termination voltage lower at one end of the bus than the other. The V
SENSE
pin can be used to improve
this performance, by connecting it to the middle of the bus. This will provide a better distribution across
the entire termination bus. If remote load regulation is not used then the V
SENSE
pin must still be
connected to V
TT
. Care should be taken when a long V
SENSE
trace is implemented in close proximity to
the memory. Noise pickup in the V
SENSE
trace can cause problems with precise regulation of V
TT
. A
small 0.1uF ceramic capacitor placed next to the V
SENSE
pin can help filter any high frequency signals and
preventing errors.
SHUTDOWN
The TJ2996 contains an active low shutdown pin that can be used to tri-state V
TT
. During shutdown
V
TT
should not be exposed to voltages that exceed AVIN. With the shutdown pin asserted low the
quiescent current of the TJ2996 will drop, however, V
DDQ
will always maintain its constant impedance of
100kΩ for generating the internal reference. Therefore to calculate the total power loss in shutdown
both currents need to be considered. For more information refer to the Thermal Dissipation section.
V
REF
V
REF
provides the buffered output of the internal reference voltage V
DDQ
/ 2. This output should be
used to provide the reference voltage for the Northbridge chipset and memory. Since these inputs are
typically extremely high impedance, there should be little current drawn from
V
REF
. For improved
performance, an output bypass capacitor can be used, located close to the pin, to help with noise. A
ceramic capacitor in the range of 0.1 µF to 0.01 µF is recommended. This output remains active during
the shutdown state for the suspend to RAM functionality.
V
TT
V
TT
is the regulated output that is used to terminate the bus resistors. It is capable of sinking and
sourcing current while regulating the output precisely to V
DDQ
/ 2. The TJ2996 is designed to handle
peak transient currents of up to ± 3A with a fast transient response. If a transient is expected to last
above the maximum continuous current rating for a significant amount of time then the output capacitor
should be sized large enough to prevent an excessive voltage drop. Despite the fact that the TJ2996 is
designed to handle large transient output currents it is not capable of handling these for long durations,
Jul. 2010 - Rev. 1.5.3
7/14
HTC
HTC [ HTC KOREA TAEJIN TECHNOLOGY CO. ]
