2.0A Low Output Voltage Ultra LDO Regulator
TJ2132
APPLICATION INFORMATION
The TJ2132 is a high performance, low dropout linear regulator, designed for high current application that
requires fast transient response. The TJ2132 operates from two input supply voltages, significantly reducing
dropout voltage. The TJ2132 is designed so that a minimum of external component are necessary.
Bias Supply Voltage
The TJ2132 control circuitry is supplied by the BIAS pin which requires a very low bias current even at
the maximum output current level. A bypass capacitor on the bias pin is recommended to improve the
performance of the TJ2132 during line and load transient. A small ceramic capacitor from BIAS pin to
ground reduces high frequency noise that could be injected into the control circuitry from the bias rail.
In practical applications, a 1uF capacitor and smaller valued capacitors such as 0.01uF or 0.001uF in
parallel with that larger capacitor may be used to decouple the bias supply. The BIAS input voltage must
be 2.1V above the output voltage, with a minimum BIAS input voltage of 2.7V.
Adjustable Regulator Design
An adjustable output device has output voltage range of 0.6V to VBIAS-2.1V. To obtain a desired output
voltage, the following equation can be used two external resistors as presented in the typical application
circuit. The resistor values are given by;
푅2 = 푅1 × (푉푂푈푇 − ꢀ)
(1)
0.6
It is suggested to use R1 values lower than 10kΩ to obtain better load transient performances. Even,
higher values up to 100 kΩ are suitable.
Enable
The TJ2132 feature an active high Enable input (EN) that allows on/off control of the regulator. The
enable function of TJ2132 has hysteresis characteristics. Pulling VEN lower than 0.4V disables the chip.
Pulling VEN higher than 1.5V enables the output voltage.
Supply Power Sequencing
In common applications where the power on transient of VIN and VBIAS voltages are not particularly fast
(Tr > 100us), no power sequencing is required. Where voltage transient input is very fast(Tr<100us), it
is recommended to have the VIN voltage present before or, at least, at the same time as the VBIAS voltage
in order to avoid over voltage spikes during the power on transient.
Output Capacitors
The TJ2132 requires an of output capacitance to maintain stability. The output capacitor must meet
both requirements for minimum amount of capacitance and ESR in all LDOs application. The TJ2132 is
designed specifically to work with low ESR ceramic output capacitor in space-saving and performance
consideration. Using a ceramic capacitor which value is at least 10uF on the TJ2132 output ensures
stability. Output capacitor of larger capacitance can reduce noise and improve load transient response,
stability, and PSRR. A minimum ceramic capacitor over than 10uF should be very closely placed to the
output voltage pin of the TJ2132.
Input Capacitor
A large bulk capacitance over than 10uF should be closely placed to the input supply pin of the TJ2132
to ensure that the input supply voltage does not sag. Also a minimum of 10uF ceramic capacitor is
recommended to be placed directly next to the IN pin. It allows for the device being some distance from
Aug. 2014 – Rev.1.1.3
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HTC
HTC [ HTC KOREA TAEJIN TECHNOLOGY CO. ]
