2.0A Low Output Voltage Ultra LDO Regulator
TJ2132
ELECTRICAL CHARACTERISTICS
Unless otherwise specified: VBIAS = 5V, VIN = VO(NOM) + 0.5V, VEN=VBIAS, IL = 10 mA, TJ=25℃.
PARAMETER
SYMBOL
VIN
TEST CONDITION
MIN.
1.1
TYP.
MAX. UNIT
Power Input Voltage
VOUT=VREF
-
-
5.5
V
VOUT=VREF
VOUT>VREF
2.7
5.5
5.5
V
V
Bias Input Voltage
VBIAS
VOUT+2.1
VBIAS=VIN=VEN=5.0V, IOUT=10mA,
VOUT=VREF
Reference Voltage
VREF
0.588
0.6
0.612
0.10
0.10
0.35
V
VIN Line Regulation(Note 1)
VBIAS Line Regulation(Note 2)
Load Regulation(Note 3)
ΔVLINE(IN)
VOUT+0.5V<VIN<5.5V, IOUT=10mA
-
-
-
0.02
0.02
0.05
%/V
%/V
%/A
ΔVLINE(BIAS) VIN=3.3V, IOUT=10mA, VOUT=VREF
10mA < IL <2A, VBIAS=VIN=VEN=5.0V,
VOUT=VREF
ΔVLOAD
IL = 0.5A, VBIAS=VEN=5.0V, VOUT=VREF
-
-
-
-
-
65
130
250
0.1
0.1
100
180
380
0.5
Dropout Voltage
VDROP
mV
IL = 1.0A, VBIAS=VEN=5.0V, VOUT=VREF
IL = 2.0A, VBIAS=VEN=5.0V, VOUT=VREF
IL = 10mA
mA
mA
uA
IGND1
Ground Pin Current(Note 4)
IL = 2.0 A
0.5
IGND2
Logic High VIH
Logic Low VIL
VEN < 0.4 V, POK=open (Note5)
-
0.1
1.0
Output=High
Output=Low
1.5
-
-
-
-
V
V
Enable Threshold
0.4
EN Input Current
IEN
VEN=VBIAS=5.0V
-
-
-
-
-
-
-
0.5
-
uA
%
%
FB Power OK Threshold
Power OK Hysteresis
OCP Threshold Level
VPOKTH
VPOKHYS
IOCP
VBIAS=VIN=VEN=5.0V, VOUT=VREF
VBIAS=VIN=VEN=5.0V, VOUT=VREF
VBIAS=VIN=VEN=5.0V, VOUT=VREF
92
7
-
-
3.5
165
20
A
℃
℃
Thermal Shutdown Temperature TSD
Thermal Shutdown Hysteresis ΔTSD
-
-
Note 1. Output voltage line regulation is defined as the change in output voltage from the nominal value due to change in the
input line voltage.
Note 2. Output voltage line regulation is defined as the change in output voltage from the nominal value due to change in the
bias line voltage.
Note 3. Output voltage load regulation is defined as the change in output voltage from the nominal value due to change in
load current. Regulation is measured at constant junction temperature by using a 10ms current pulse. Devices are
tested for load regulation in the load range from 10mA to 2.0A
Note 4. IGND = IBIAS + (IIN – IOUT). The total current drawn from the supply is the sum of the load current plus the ground
current.
Note 5. When POK pin is applied to VBIAS through the resistor R3, IGND2 should be added to the bias current (VBIAS - VPOK ) / R3.
Aug. 2014 – Rev.1.1.3
5
HTC