Recommended Handling Precautions provided in the circuit board
“Common Transceiver
directly under the transceiver
Footprint” hole pattern defined
in the original multisource
announcement which defined
the 1 x 9 package style. This
drawing is reproduced in
Figure 8 with the addition of
ANSI Y14.5M compliant
dimensioning to be used as a
guide in the mechanical layout
of your circuit board.
Agilent recommends that
to provide a low inductance
normal static precautions be
ground for signal return
taken in the handling and
current. This recommendation
assembly of these transceivers
is in keeping with good high
to prevent damage which may
be induced by electrostatic
discharge (ESD).
The HFBR-5800 series of
transceivers meet MIL-STD-
883C Method 3015.4 Class 2
frequency board layout
practices.
Board Layout - Hole Pattern
The Agilent transceiver
complies with the circuit board
products.
Care should be used to avoid
shorting the receiver data or
signal detect outputs directly
to ground without proper
current limiting impedance.
Rx
Tx
Solder and Wash Process
Compatibility
NO INTERNAL CONNECTION
NO INTERNAL CONNECTION
The transceivers are delivered
with protective process plugs
inserted into the duplex SC or
duplex ST connector
HFBR-5805
TOP VIEW
receptacle. This process plug
protects the optical
subassemblies during wave
solder and aqueous wash
processing and acts as a dust
cover during shipping.
Rx
EE
1
Rx
CC
5
Tx
CC
6
Tx
EE
9
V
RD
2
RD
3
SD
4
V
V
TD
7
TD
8
V
These transceivers are compat-
ible with either industry
standard wave or hand solder
processes.
C1
C2
V
CC
R2
R3
C5
L1
L2
TERMINATION
AT PHY
DEVICE
Shipping Container
R1
R4
V
C3
C4
CC
The transceiver is packaged in
a shipping container designed
to protect it from mechanical
and ESD damage during
INPUTS
V
CC FILTER
AT VCC PINS
TRANSCEIVER
R9
R5
R7
TERMINATION
AT TRANSCEIVER
INPUTS
C6
R6
R8
shipment or storage.
R10
Board Layout - Decoupling Circuit
and Ground Planes
RD
RD
SD
V
TD
TD
CC
It is important to take care in
the layout of your circuit
board to achieve optimum
performance from these
transceivers. Figure 7 provides
a good example of a schematic
for a power supply decoupling
circuit that works well with
these parts. It is further
NOTES:
THE SPLIT-LOAD TERMINATIONS FOR ECL SIGNALS NEED TO BE LOCATED AT THE INPUT
OF DEVICES RECEIVING THOSE ECL SIGNALS. RECOMMEND 4-LAYER PRINTED CIRCUIT
BOARD WITH 50 OHM MICROSTRIP SIGNAL PATHS BE USED.
R1 = R4 = R6 = R8 = R10 = 130 OHMS FOR +5.0 V OPERATION, 82 OHMS FOR +3.3 V OPERATION.
R2 = R3 = R5 = R7 = R9 = 82 OHMS FOR +5.0 V OPERATION, 130 OHMS FOR +3.3 V OPERATION.
C1 = C2 = C3 = C5 = C6 = 0.1 µF.
C4 = 10 µF.
L1 = L2 = 1 µH COIL OR FERRITE INDUCTOR.
recommended that a
contiguous ground plane be
Figure 7. Recommended Decoupling and Termination Circuits
7
HP [ HEWLETT-PACKARD ]
