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HDMP-1034A 参数 Datasheet PDF下载

HDMP-1034A图片预览
型号: HDMP-1034A
PDF下载: 下载PDF文件 查看货源
内容描述: 发射器/接收器芯片组 [Transmitter/Receiver Chip Set]
分类和应用:
文件页数/大小: 32 页 / 249 K
品牌: HP [ AGILENT(HEWLETT-PACKARD) ]
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Multiple Channel Configuration
The connections for a multiple
channel configuration are shown
in Figure 4.3. The daisy-chain
signals SRQIN and SRQOUT are
used to allow each receiver’s PASS
system shift requests to propagate
to the master, which is the last of
the chain. The master then con-
trols the shift command SHFOUT,
which is tied common to the
SHFIN of each receiver. The first
SRQIN in the chain is grounded;
the SRQOUT of the master as
well as the SHFOUT outputs of
the slave units are left uncon-
nected.
When the internal parallel data
boundary of the master, or any
of the slaves come within 10% of
the REFCLK, the RXDSLIP output
is set high by the respective Rx,
a shift request (SRQOUT=1) is
issued which propagates to the
master. The master again selects
an optimum SHFOUT, which sets
the DELAY blocks of all receivers
consistently.
The phase absorption margin for
a multiple channel configuration
is the same as the single channel
case, less the channel-to-channel
skews.
SRQIN
DATA 16 BITS
TX[0-15]
HSOUT–
HSIN–
SHFIN
SHFOUT
RXCLK0/1
RX[0-15]
NC
Tx
Rx
(SLAVE)
PASSENB
SRQOUT
+V
CC
REFCLK
TXCLK
SRQIN
DATA 16 BITS
TX[0-15]
HSOUT–
HSIN–
SHFIN
SHFOUT
RXCLK0/1
RX[0-15]
NC
Tx
Rx
(SLAVE)
PASSENB
SRQOUT
+V
CC
REFCLK
TXCLK
SRQIN
DATA 16 BITS
TX[0-15]
HSOUT–
HSIN–
SHFIN
SHFOUT
RXCLK0/1
RX[0-15]
Tx
Rx
(MASTER)
PASSENB
SRQOUT
+V
CC
NC
REFCLK
REFCLK
TXCLK
Figure 4.3. Multiple channel configuration with PASS Enabled (PASSENB=1).
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