Conversion from HCPL-4562 to
HCNW4562
Figure 15 shows the dependency of the DC output
voltage on hFEX
.
In order to obtain similar circuit performance when
converting from the HCPL-4562 to the HCNW4562,
it is recommended to increase the Quiescent Input
Current, IFQ, from 6 mA to 10 mA. If the application
circuit in Figure 4 is used, then potentiometer R4
should be adjusted appropriately.
For 9 V < VCC < 12 V, select the value of R11 such
that
VO
R11
4.25 V
470 Ω
ICQ4 ––– ≤ –––––– ≤ 9.0 mA
(8)
(9)
Q4
The voltage gain of the second stage (Q3) is
approximately equal to:
Design Considerations of the
Application Circuit
R
R10
1
––9– –––––––––––––––––––––––––
*
The application circuit in Figure 4 incorporates
several features that help maximize the bandwidth
performance of the HCPL-4562/HCNW4562. Most
important of these features is peaked response of
the detector circuit that helps extend the frequency
range over which the voltage gain is relatively
constant. The number of gain stages, the overall
circuit topology, and the choice of DC bias points
are all consequences of the desire to maximize
bandwidth performance.
1
1 + s R9 CCQ + –––––––––
3
2π R′ fT4
11
4
Increasing R′ (R′ includes the parallel
11
11
combination of R11 and the load impedance) or
reducing R9 (keeping R9/R10 ratio constant) will
improve the bandwidth.
If it is necessary to drive a low impedance load,
bandwidth may also be preserved by adding an
additional emitter following the buffer stage (Q5 in
Figure 16), in which case R11 can be increased to
set ICQ4 2 mA.
To use the circuit, first select R1 to set VE for the
desired LED quiescent current by:
VE
FQ = ––
R4
GV V R10
(∂IPB/∂IF) R7R9
–––––––E––––––
(1)
Finally, adjust R4 to achieve the desired voltage
gain.
I
VOUT ∂IPB R7R9
For a constant value VINp-p, the circuit topology
GV –––– –––– ––––––
(10)
(adjusting the gain with R4) preserves linearity by
keeping the modulation factor (MF) dependent only
on VE.
V
IN
∂IF R4R10
∂IPB
where typically –––– = 0.0032
∂IF
iFp-p V /R4
(2)
IN
p-p
Definition:
GV = Voltage Gain
iFp-p
iPBp-p
V
INp-p
p-p
p-p
p-p
–––– ––––– = –––––
(3)
(4)
IFQ = Quiescent LED forward current
iFp-p = Peak-to-peak small signal LED forward
current
INp-p = Peak-to-peak small signal input voltage
iPBp-p = Peak-to-peak small signal
base photo current
IPBQ = Quiescent base photo current
VBEX = Base-Emitter voltage of HCPL-4562/
HCNW4562 transistor
IBXQ = Quiescent base current of HCPL-4562/
HCNW4562 transistor
IFQ
IPBQ
VE
Modulation
Factor (MF): ––––– = –––––
2 IFQ 2 VE
iF(p-p)
V
INp-p
p-p
(p-p)
V
For a given GV, VE, and VCC, DC output voltage will
vary only with hFEX
.
R9
R10
VO = VCC – VBE – ––– [VBEX – (IPBQ – IBXQ) R7]
(5)
4
Where:
hFEX = Current Gain (IC/IB) of HCPL-4562/
HCNW4562 transistor
VE = Voltage across emitter degeneration
resistor R4
GV VER
IPBQ –––––––1–0
R7R9
(6)
(7)
and,
f
= Unity gain frequency of Q5
T4
CCQ = Effective capacitance from collector of Q3
VCC – 2 VBE
IBXQ ––––––––––
R6 hFEX
3
to ground
1-401
HP [ HEWLETT-PACKARD ]
