V
CC
HCPL-2219 OPTION 060 ONLY
(mW)
HCPL-2200
V
800
700
600
500
400
300
200
100
0
P
OUTPUT V
MONITORING
NODE
S
1
2
3
4
8
7
6
5
O
CC
A
B
I
(mA)
S
R
IN
0.1 µF
BYPASS
V
FF
GND
V
CM
+
–
PULSE GENERATOR
50 V
SWITCH AT A: I = 1.6 mA
V
0
25 50 75 100 125 150 175 200
– CASE TEMPERATURE – °C
CM
0 V
T
S
F
V
OH
V
(MIN.)*
O
Figure 12. Thermal Derating Curve,
Dependence of Safety Limiting Value
with Case Temperature per
VDE 0884.
OUTPUT
SWITCH AT B: I = 0 mA
F
V
O
V
(MAX.)*
O
V
OL
* SEE NOTE 6.
Figure 11. Test Circuit for Common Mode Transient Immunity and Typical
Waveforms.
V
CC1
(+5 V)
V
CC2
120 pF (OPTIONAL*)
HCPL-2200
(4.5 TO 20 V)
V
V
CC2
CC1
(+5 V)
120 pF
(+5 V)
HCPL-2200
1.1
DATA
OUTPUT
kΩ
1.1
kΩ
R
L
V
CC
1
2
3
4
8
7
6
5
V
1
2
3
4
8
7
6
5
CC
DATA
OUTPUT
CMOS
UP TO 16
LSTTL
LOADS
OR 4 TTL
LOADS
DATA
INPUT
DATA
INPUT
TTL OR
LSTTL
GND
TTL OR
LSTTL
GND
TOTEM
TOTEM
POLE
OUTPUT
GATE
POLE
OUTPUT
GATE
V
5 V
10 V
15 V
20 V
R
L
CC2
2
1.1 K
2.37 K
3.83 K
5.11 K
1
1
2
Figure 13. Recommended LSTTL to LSTTL Circuit.
Figure 14. LSTTL to CMOS Interface Circuit.
V
(+5 V)
CC
120 pF (OPTIONAL*)
HCPL-2200
1.1
kΩ
HCPL-2200
V
(+5 V)
CC1
1.1 kΩ
V
V
CC
CC
1
2
3
4
8
7
6
5
1
2
3
4
8
DATA
INPUT
7
6
5
4.7 kΩ
D1
DATA
INPUT
TTL OR
LSTTL
TTL OR
LSTTL
GND
GND
OPEN
COLLECTOR
GATE
D1 (1N4150) REQUIRED FOR
ACTIVE PULL-UP DRIVER.
Figure 16. Series LED Drive with Open Collector Gate
(4.7 kΩ Resistor Shunts I from the LED).
Figure 15. Recommended LED Drive Circuit.
OH
*The 120 pF capacitor may be omitted in applications where 500 ns propagation delay is sufficient.
1-130