Applications Information
Selecting the Gate Resistor (R ) to
Step 2: Check the HCPL-5120 Power
g
Minimize IGBT Switching Losses.
Dissipation and Increase R if
Necessary.
g
Eliminating Negative IGBT Gate Drive
To keep the IGBT firmly off, the
HCPL-5120 has a very low
Step 1: Calculate R Minimum from
g
The HCPL-5120 total power
the I Peak Specification.
OL
dissipation (P ) is equal to the
T
maximum V specification of
OL
The IGBT and R in Figure 26
sum of the emitter power (P )
g
E
0.5 V. The HCPL-5120 realizes
can be analyzed as a simple RC
circuit with a voltage supplied
by the HCPL-5120.
and the output power (P ):
O
this very low V by using a
OL
P
P
P
= P + P
E O
DMOS transistor with 1 Ω
T
E
O
(typical) on resistance in its
pull down circuit. When the
HCPL-5120 is in the low state,
the IGBT gate is shorted to the
= I • V •Duty Cycle
F
F
(V
- V
- V
)
CC
EE
OL
= P
+ P
O (SWITCHING)
O(BIAS)
R = –––––––––––––––––
g
I
OLPEAK
= I • (V - V ) + ESW(R ,
CC
CC
EE
g
Q ) • f
emitter by R + 1 Ω. Minimizing
g
g
(V
– V – 2V)
EE
CC
R and the lead inductance from
= ––––––––––––––––––
g
For the circuit in Figure 26
with I (worst case) = 18 mA,
I
the HCPL-5120 to the IGBT
gate and emitter (possibly by
mounting the HCPL-5120 on a
small PC board directly above
the IGBT) can eliminate the
need for negative IGBT gate
drive in many applications as
shown in Figure 25. Care should
be taken with such a PC board
design to avoid routing the
IGBT collector or emitter traces
close to the HCPL-5120 input
as this can result in unwanted
coupling of transient signals
into the HCPL-5120 and
degrade performance. (If the
IGBT drain must be routed near
the HCPL-5120 input, then the
LED should be reverse-biased
when in the off state, to prevent
the transient signals coupled
from the IGBT drain from
OLPEAK
F
R = 8 Ω, Max Duty Cycle = 80%,
(15 V + 5 V – 2V)
= –––––––––––––––––––
2.5 A
g
Q = 500 nC, f = 20 kHz and T
g
A
max = 125°C:
= 7.2Ω ≈ 8 Ω
P
P
= 18 mA•1.8 V•0.8 = 26 mW
E
O
= 4.25 mA•20 V + 1.0 µJ • 20
The V value of 2 V in the
OL
kHz
previous equation is a
= 85 mW + 20 mW
conservative value of V at the
OL
peak current of 2.5A (see Figure
= 105 mW
6). At lower R values the
g
< 112 mW (P
@ 125°C
O(MAX)
voltage supplied by the HCPL-
5120 is not an ideal voltage
step. This results in lower peak
currents (more margin) than
predicted by this analysis. When
negative gate drive is not used
= 250 mW - 23°C • 6 mW/°C)
The value of 4.25 mA for I in
CC
the previous equation was
obtained by derating the I
CC
max of 5 mA (which occurs at -
55°C) to I
max at 125°C.
CC
V
in the previous equation is
EE
equal to zero volts
Since P for this case is less
O
than P
, R of 8 Ω is
O(MAX)
g
appropriate.
turning on the HCPL-5120.)
+5 V
1
8
V
= 18 V
CC
+ HVDC
270 Ω
0.1 µF
+
_
2
7
Rg
Q1
Q2
3-PHASE
AC
CONTROL
3
6
5
INPUT
74XXX
OPEN
4
COLLECTOR
- HVDC
Figure 25. Recommended LED Drive and Application Circuit
12