10
C
= 15 pF INCLUDING PROBE
L
AND JIG CAPACITANCE.
PULSE
GENERATOR
+5 V
V
CC
Z
= 50 Ω
O
t
= t = 5 ns
r
f
V
O
S1
619 Ω
D.U.T.
D1-4 ARE 1N916 OR 1N3064
V
CC
D
1
V
O
I
F
D
D
D
2
3
4
C
L
V
E
GND
5 KΩ
INPUT V
MONITORING
NODE
O
S2
Figure 8. Test Circuit for tPHZ, tPZH, tPLZ, and tPZL
.
A
V
CC
D.U.T.
B
OUTPUT V
MONITORING
NODE
O
V
CC
R
IN
V
O
0.1 µF
BYPASS
V
E
V
FF
GND
*SEE NOTE 6.
V
CM
+
–
PULSE GEN.
Figure 9. Test Circuit for Common Mode Transient Immunity and Typical Waveforms.
V
CC1
(+5 V)
V
CC2
(4.5 TO 20 V)
665 Ω
D.U.T.
V
CC
R
DATA
OUTPUT
V
L
CC1
(+5 V)
V
O
DATA
INPUT
CMOS
750 Ω
TTL OR
LSTTL
D.U.T.
V
E
V
CC
GND
DATA
INPUT
TTL OR
LSTTL
TOTEM
POLE
V
R
L
CC2
OUTPUT
GATE
5 V
1.1 K
1
2
TOTEM
POLE
OUTPUT
GATE
10 V
15 V
20 V
2.37 K
3.83 K
5.11 K
GND
Figure 10. LSTTL to CMOS Interface Circuit.
Figure 11. Recommended LED Drive Circuit.
HP [ HEWLETT-PACKARD ]
