RFM70
4
State Control
4.1
State Control Diagram
Pin signal: VDD, CE
SPI register: PWR_UP, PRIM_RX,
EN_AA, NO_ACK, ARC, ARD
System information: Time out, ACK
received, ARD elapsed, ARC_CNT, TX
FIFO empty, ACK packet transmitted,
Packet received
VDD>=1.9 V
V1.0
RFM70 has built-in state machines that
control the state transition between different
modes.
When auto acknowledge feature is disabled,
state transition will be fully controlled by
MCU.
Power Down
PWR_UP=1
PWR_UP=0
Standby-I
Time out or ACK received
CE=1
ARD elapsed and ARC_CNT<ARC
CE=0
CE=0
TX FIFO empty
RX
Standby-II
TX FIFO
Data Ready
TX
EN_AA=1
NO_ACK=0
Figure 3 PTX (PRIM_RX=0) state control diagram
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6
HOPERF [ Hope Microelectronics co., Ltd ]
