RFM42/43
Register 07h. Operating Mode and Function Control 1
Bit
D7
D6
D5
D4
x32ksel
R/w
D3
txon
R/w
D2
Reserved
R/w
D1
D0
xton
R/w
swres
enlbd
enwt
pllon
Name
Type
R/w
R/w
R/w
R/w
Reset value = 00000001
Bit
Name
Function
Software Register Reset Bit.
This bit may be used to reset all registers simultaneously to a DEFAULT state,
without the need for sequentially writing to each individual register. The RESET is
accomplished by setting swres = 1. This bit will be automatically cleared.
Enable Low Battery Detect.
7
swres
6
5
4
enlbd
enwt
When this bit is set to 1 the Low Battery Detector circuit and threshold
comparison will be enabled.
Enable Wake-Up-Timer.
Enabled when enwt = 1. If the Wake-up-Timer function is enabled it will operate in
any mode and notify the microcontroller through the GPIO interrupt when the timer
expires.
32,768 kHz Crystal Oscillator Select.
x32ksel
txon
0: RC oscillator
1: 32 kHz crystal
TX on in Manual Transmit Mode.
Automatically cleared in FIFO mode once the packet is sent. Transmission can be
aborted during packet transmission, however, when no data has been sent yet,
transmission can only be aborted after the device is programmed to ―unmodulated
carrier‖ ("Register 71h. Modulation Mode Control 2").
Reserved.
3
2
1
0
Reserved
pllon
TUNE Mode (PLL is ON).
When pllon = 1 the PLL will remain enabled in Idle State. This will for faster
turn-around time at the cost of increased current consumption in Idle State.
READY Mode (Xtal is ON).
xton
58
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