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RFM31B-868-S1 参数 Datasheet PDF下载

RFM31B-868-S1图片预览
型号: RFM31B-868-S1
PDF下载: 下载PDF文件 查看货源
内容描述: ISM接收器 [ISM RECEIVER]
分类和应用: ISM频段
文件页数/大小: 57 页 / 1222 K
品牌: HOPERF [ HOPERF ]
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RFM31B  
3. Controller Interface  
3.1. Serial Peripheral Interface (SPI)  
The RFM31B communicates with the host MCU over a standard 3-wire SPI interface:SCLK, SDI,and nSEL. The  
host MCU can read data from the device on the SDO output pin. A SPI transaction is a 16-bit sequence which  
consists of a Read-Write (R/W) select bit, followed by a 7-bit address field (ADDR), and an 8-bit data field (DATA)  
as demonstrated in Figure 2. The 7-bit address field is used to select one of the 128, 8-bit control registers. The  
R/W select bit determines whether the SPI transaction is a read or write transaction. If R/W = 1 it signifies a WRITE  
transaction, while R/W = 0 signifies a READ transaction. The contents (ADDR or DATA) are latched into the RFM31B  
every eight clock cycles. The timing parameters for the SPI interface are shown in Table 9. The SCLK rate is  
flexible with a maximum rate of 10 MHz.  
Data  
Address  
MSB  
LSB  
RW A6 A5 A4 A3 A2 A1 A0 D7 D6 D5 D4 D3 D2 D1 D0 xx xx RW A7  
SDI  
SCLK  
nSEL  
Figure 2. SPI Timing  
Table 9. Serial Interface Timing Parameters  
Symbol  
Parameter  
Min (nsec)  
Diagram  
t
Clock high time  
Clock low time  
40  
40  
20  
20  
20  
20  
50  
20  
50  
80  
CH  
t
CL  
DS  
DH  
DD  
SCLK  
t
Data setup time  
tSS  
tCL tCH  
tDS tDH tDD  
tSH tDE  
t
t
Data hold time  
SDI  
Output data delay time  
Output enable time  
Output disable time  
Select setup time  
Select hold time  
SDO  
t
t
EN  
DE  
tEN  
tSW  
nSEL  
t
SS  
SH  
t
t
Select high period  
SW  
To read back data from the RFM31B,the R/W bit must be set to 0 followed by the 7-bit address of the register from  
which to read. The 8 bit DATA field following the 7-bit ADDR field is ignored n the SDI pin when R/W = 0. The next  
eight negative edge transitions of the SCLK signal will clock out the contents of the selected register. The data read  
from the selected register will be available on the SDO output pin. The READ function is shown in Figure 3. After  
the READ function is completed the SDO pin will remain at either a logic 1 or logic 0 state depending on the last  
data bit clocked out (D0). When nSEL goes high the SDO output pin will be pulled high by internal pullup.  
Tel: +86-755-82973805 Fax: +86-755-82973550 E-mail: sales@hoperf.com http://www.hoperf.com  
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