RFM23
Table 29. Interrupt or Status 1 Bit Set/Clear Description
Status
Name
ifferr
Set/Clear Conditions
Bit
7
Set if there is a FIFO overflow or underflow. Cleared by applying FIFO reset.
Set when the number of bytes written to TX FIFO is greater than the Almost Full
threshold.Automatically cleared at the start of transmission when the number of bytes
in the FIFO is less than or equal to the threshold.
itxffafull
ixtffaem
6
5
Set when the number of bytes in the TX FIFO is less than or equal to the Almost
Empty threshold. Automatically cleared when the number of data bytes in the TX
FIFO is above the Almost Empty threshold.
Set when the number of bytes in the RX FIFO is greater than the Almost Full threshold.
Cleared when the number of bytes in the RX FIFO is below the Almost Full threshold.
External interrupt source.
irxffafull
iext
4
3
2
Set once a packet is successfully sent (no TX abort). Cleared upon leaving FIFO
mode or at the start of a new transmission.
ipksent
Set up the successful reception of a packet (no RX abort). Cleared upon receiving
and acknowledging the Sync Word for the next packet.
ipkvalid
icrerror
1
0
Set if the CRC computed from the RX packet differs from the CRC in the TX packet.
Cleared at the start of reception for the next packet.
Table 30. When are Individual Status Bits Set/Cleared if not Enabled as Interrupts?
Status
Name
Set/Clear Conditions
Bit
Set if there is a FIFO Overflow or Underflow. It is cleared only by applying FIFO reset
to the specific FIFO that caused the condition.
7
ifferr
Will be set when the number of bytes written to TX FIFO is greater than the Almost Full
threshold set by SPI. It is automatically cleared when we start transmitting and the FIFO data is
read out and the number of bytes left in the FIFO is smaller or equal to the threshold).
Will be set when the number of bytes (not yet transmitted) in TX FIFO is smaller or equal than
the Almost Empty threshold set by SPI. It is automatically cleared when we write enough data
to TX FIFO so that the number of data bytes not yet transmitted is above the Almost Empty
threshold.
itxffafull
6
5
4
ixtffaem
irxffafull
Will be set when the number of bytes received (and not yet read-out) in RX FIFO is greater than
the Almost Full threshold set by SPI. It is automatically cleared when we read enough data from
RX FIFO so that the number of data bytes not yet read is below the Almost Full threshold.
External interrupt source
iext
3
2
Will go high once a packet is sent all the way through (no TX abort). This status will be cleaned
if 1) We leave FIFO mode or 2) In FIFO mode we start a new transmission.
Goes high once a packet is fully received (no RX abort). It is automatically cleaned
once we receive and acknowledge the Sync Word for the next packet.
Goes High once the CRC computed during RX differs from the CRC sent in the
packet by the TX. It is cleaned once we start receiving new data in the next packet.
ipksent
ipkvalid
icrerror
1
0
76
Tel: +86-755-82973805
Fax: +86-755-82973550
E-mail: sales@hoperf.com
http://www.hoperf.com
HOPERF [ HOPERF ]
