RFM22
Register 1Eh. AFC Timing Control
Bit
D7
Reserved
D6
D5
D4
shwait[2:0]
R/W
D3
D2
D1
D0
lgwait[2:0]
R/W
Name
Type
R
Reset value = xx001010
Bit
Name
Function
Reserved
Reserved.
7:6
Short Wait Periods after AFC Correction.
Used before preamble is detected. Short wait = (RegValue + 1) x 2Tb. If set to 0
then no AFC correction will occur before preamble detect, i.e. AFC will be
disabled.
shwait[2:0]
lgwait[2:0]
5:3
2:0
Long Wait Periods after Correction.
Used after preamble detected. Long wait = (RegValue + 1) x 2Tb. If set to 0
then no AFC correction will occur after the preamble detect.
The gear-shift register controls BCR loop gain. Before the preamble is detected, BCR loop gain is as follows:
crgain
BCRLoopGain =
crfast
2
Once the preamble is detected, internal state machine automatically shift BCR loop gain to the following:
crgain
2crslow
BCRLoopGain =
crfast = 3‘b000 and crslow = 3‘b101 are recommended for most applications. The value of ―crslow‖ should be
greater than ―crfast‖.
96
Tel: +86-755-82973805
Fax: +86-755-82973550
E-mail: sales@hoperf.com
http://www.hoperf.com
HOPERF [ HOPERF ]
