RFM22
Register 08h. Operating Mode and Function Control 2
Bit
D7
D6
D5
D4
rxmpk
R/w
D3
autotx
R/w
D2
enldm
R/w
D1
ffclrrx
R/w
D0
ffclrtx
R/w
antdiv[2:0]
R/w
Name
Type
Reset value = 00000000
Bit
Name
Function
Enable Antenna Diversity.
The GPIO must be configured for Antenna Diversity for the algorithm to work properly.
RX/TX state
non RX/TX state
GPIO Ant2 GPIO Ant1 GPIO Ant2
GPIO Ant1
000:
001:
010:
011:
100:
101:
110:
111:
0
1
0
1
0
0
1
0
1
0
0
1
1
0
1
0
1
0
0
1
1
1
antdiv[2:0]
7:5
0
1
antenna diversity algorithm
antenna diversity algorithm
ant. div. algorithm in beacon mode
ant. div. algorithm in beacon mode
RX Multi Packet.
When the module is selected to use FIFO Mode (dtmod[1:0]) and RX Packet
Handling (enpacrx) then it will fill up the FIFO with multiple valid packets if this
bit is set, otherwise the receiver will automatically leave the RX State after the
first valid packet has been received.
rxmpk
autotx
enldm
4
3
2
Automatic Transmission.
When autotx = 1 the transceiver will enter automatically TX State when the
FIFO is almost full. When the FIFO is empty it will automatically return to the
Idle State.
Enable Low Duty Cycle Mode.
If this bit is set to 1 then the module turns on the RX regularly. The frequency
should be set in the Wake-Up Timer Period register, while the minimum ON
time should be set in the Low-Duty Cycle Mode Duration register. The FIFO
mode should be enabled also.
RX FIFO Reset/Clear.
ffclrrx
ffclrtx
1
0
This has to be a two writes operation: Setting ffclrrx =1 followed by ffclrrx = 0
will clear the contents of the RX FIFO.
TX FIFO Reset/Clear.
This has to be a two writes operation: Setting ffclrtx =1 followed by ffclrtx = 0
will clear the contents of the TX FIFO.
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