LINEAR MAGNETIC FIELD SENSORS
200
1µF (1)
+5 to 6V
5V
Clock
3
HMC1022
4
4 to14V
IRF7105 (2)
DI9952 (2)
set
14
0.1µF
8
9,15
TPW ~ 2 µsec
S/R
5,6
7,8
reset
2
Clock
-4 to -14V
S/R
1
(1) Tantalum, low R
(2) Rds ~0.2 ohm
set rst set
Figure 13—Set/Reset Pulse With Clock Control (1021/1022)
Low Power—For low power application, down to 3.3 volt
supply, the circuit shown in Figure 15 can be used. These
low threshold FETs provide low on-resistance (0.3Ω) at
VGS=2.7V. The set/reset pulsing does not need to be
continuous. To save power, the SET pulse can be initially
applied followed by a single RESET pulse. The offset (OS)
can be calculated as:
SET Pulse
Read Vset
RESET Pulse
Read Vrst
OS = (Vset + Vrst)/2
OS = (Vset+Vrst)/2
Vout = Vrst - OS
This offset term will contain the DC offset of both the sensor
bridge and interface electronics, as well as the temperature
drift of the bridge and interface electronics. Store this value
and subtract it from all future bridge output readings. Once
the bridge is RESET, it will remain in that state for years—
or until a disturbing field (>20 gauss) is applied. A timer can
be set, say every 10 minutes, to periodically update the
offset term. A flow chart is shown in Figure 14 along with a
timing diagram in Figure 15 to illustrate this process.
Timer
y
expired?
n
Read Vrst
Figure 14—Low Power Set/Rst Flowchart
a
b
a
c
T
T
T
T
200
Reset
Set
1µF (1)
+3.3 to
6.5V
+
1,3
HMC1022
8
2,4
d
d
T
T
Set
14
0.1µF
9,15
read
Vset
read
Vrst
Vout
NDS9933
5,6,7,8
5,6,7,8
Vp
set
2,4
S/R
S/R
Reset
PW
T
(1) Tantalum, low R
(2) Rds ~0.2 ohm
1,3 NDS8926
a > 5 µsec
reset
T
-Vp
b > 1 µsec
T
T
T
c > 20 µsec, 50 msec(max)
d > 20 µsec
PW ~ 2 µsec
T
Vp > 3 V
Figure 15—Single Clock Set/Reset Pulse Circuit (1021/1022)
11
HONEYWELL [ Honeywell ]
