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BR8F 参数 Datasheet PDF下载

BR8F图片预览
型号: BR8F
PDF下载: 下载PDF文件 查看货源
内容描述: [400mA 8.0kV 100nS High Voltage Medium and High Current Diodes]
分类和应用:
文件页数/大小: 58 页 / 442 K
品牌: HOLTIC [ HOLT INTEGRATED CIRCUITS ]
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HT46R01A
Program Counter
During program execution, the Program Counter is used
to keep track of the address of the next instruction to be
executed. It is automatically incremented by one each
time an instruction is executed except for instructions,
such as
²JMP²
or
²CALL²
that demand a jump to a
non-consecutive Program Memory address. Note that
the Program Counter width varies with the Program
Memory capacity depending upon which device is se-
lected. However, it must be noted that only the lower 8
bits, known as the Program Counter Low Register, are
directly addressable by user.
When executing instructions requiring jumps to
non-consecutive addresses such as a jump instruction,
a subroutine call, interrupt or reset, etc., the
microcontroller manages program control by loading the
required address into the Program Counter. For condi-
tional skip instructions, once the condition has been
met, the next instruction, which has already been
fetched during the present instruction execution, is dis-
carded and a dummy cycle takes its place while the cor-
rect instruction is obtained.
The lower byte of the Program Counter, known as the
Program Counter Low register or PCL, is available for
program control and is a readable and writeable regis-
ter. By transferring data directly into this register, a short
program jump can be executed directly, however, as
only this low byte is available for manipulation, the
jumps are limited to the present page of memory, that is
256 locations. When such program jumps are executed
it should also be noted that a dummy cycle will be in-
serted.
The lower byte of the Program Counter is fully accessi-
ble under program control. Manipulating the PCL might
cause program branching, so an extra cycle is needed
to pre-fetch. Further information on the PCL register can
be found in the Special Function Register section.
Stack
This is a special part of the memory which is used to
save the contents of the Program Counter only. The
stack has 4 levels and is neither part of the data nor part
of the program space, and is neither readable nor
writable. The activated level is indexed by the Stack
Pointer, SP, and is neither readable nor writeable. At a
subroutine call or interrupt acknowledge signal, the con-
tents of the Program Counter are pushed onto the stack.
At the end of a subroutine or an interrupt routine, sig-
naled by a return instruction, RET or RETI, the Program
Counter is restored to its previous value from the stack.
After a device reset, the Stack Pointer will point to the
top of the stack.
If the stack is full and an enabled interrupt takes place,
the interrupt request flag will be recorded but the ac-
knowledge signal will be inhibited. When the Stack
Pointer is decremented, by RET or RETI, the interrupt
will be serviced. This feature prevents stack overflow al-
lowing the programmer to use the structure more easily.
However, when the stack is full, a CALL subroutine in-
struction can still be executed which will result in a stack
overflow. Precautions should be taken to avoid such
cases which might cause unpredictable program
branching.
P ro g ra m
C o u n te r
T o p o f S ta c k
S ta c k
P o in te r
B o tto m
o f S ta c k
S ta c k L e v e l 1
S ta c k L e v e l 2
S ta c k L e v e l 3
S ta c k L e v e l 4
P ro g ra m
M e m o ry
Program Counter Bits
Mode
b9
Initial Reset
External Interrupt
Timer/Event Counter Overflow
A/D Converter Interrupt
Skip
Loading PCL
Jump, Call Branch
Return from Subroutine
PC9
#9
S9
PC8
#8
S8
@7
#7
S7
@6
#6
S6
0
0
0
0
b8
0
0
0
0
b7
0
0
0
0
b6
0
0
0
0
b5
0
0
0
0
b4
0
0
0
0
b3
0
0
1
1
b2
0
1
0
1
b1
0
0
0
0
b0
0
0
0
0
Program Counter + 2
@5
#5
S5
@4
#4
S4
@3
#3
S3
@2
#2
S2
@1
#1
S1
@0
#0
S0
Program Counter
Note:
PC9~PC8: Current Program Counter bits
@7~@0: PCL bits
#9~#0: Instruction code address bits
S9~S0: Stack register bits
7
August 13, 2008
Rev. 1.10