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HI-8382JT 参数 Datasheet PDF下载

HI-8382JT图片预览
型号: HI-8382JT
PDF下载: 下载PDF文件 查看货源
内容描述: ARINC- 429差分线路驱动器 [ARINC 429 DIFFERENTIAL LINE DRIVER]
分类和应用: 驱动器
文件页数/大小: 8 页 / 242 K
品牌: HOLTIC [ HOLT INTEGRATED CIRCUITS ]
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HI-8382, HI-8383  
FUNCTIONAL DESCRIPTION  
The driver can beexternally powered down by applying a logic  
high tothe STROBE inputpin. Ifthis featureis not being used,  
the pinshouldbetiedtoground.  
The SYNC and CLOCK inputs establish data synchronization  
utilizing two AND gates, one for each data input. Each logic  
input, including the power enable (STROBE) input, are  
TTL/CMOS compatible. Besides reducing chip current drain,  
STROBE also floats each output. However the overvoltage  
fuses anddiodes oftheHI-8382arenotswitchedout.  
The CA and CB pins are inputs to unity gain amplifiers.  
Therefore they must be allowed to swing to -5V. Provision to  
switch capacitors must be done with analog switches that  
allowvoltages belowtheirground.  
Figure 1 illustrates a typical ARINC 429 bus application.  
Three power supplies are necessary to operate the HI-8382;  
typically +15V, -15V and +5V. The chip also works with ±12V  
supplies. The +5V supply can also provide a reference  
voltage that determines the output voltage swing. The  
differential output voltage swing will equal 2VREF. If a value of  
VREF other than +5V is needed, a separate +5V power supply  
is requiredforpinV1 .  
+5V  
+15V  
V
REF  
OUT  
V
1
SYNC  
DATA (A)  
CLOCK  
With the DATA (A) input at a logic high and DATA (B) input at a  
logic low, AOUT will switch to the +VREF rail and BOUT will  
switch to the -VREF rail (ARINC HIGH state). With both data  
input signals at a logic low state, the outputs will both switch to  
0V (ARINC NULLstate).  
+V  
-V  
INPUTS  
TO ARINC BUS  
B
STROBE  
GND  
DATA (B)  
C
C
The driver output impedance, ROUT, is nominally 75 ohms.  
The rise and fall times of theoutputs can be calibrated through  
the selection of two external capacitor values that a re  
connected to the CA and CB i nput pins. Typical values for  
high-speed operation (100KBPS) are CA = CB = 75pF and for  
low-speedoperation(12.5to14KBPS) CA = CB = 500pF.  
-15V  
Figure 1. ARINC 429 BUS APPLICATION  
+V  
C
REF  
A
OUTPUT  
DRIVER (A)  
DATA (A)  
CLOCK  
SYNC  
LEVEL SHIFTER  
AND SLOPE  
CONTROL (A)  
FA  
ROUT/2  
R L  
C L  
LEVEL SHIFTER  
AND SLOPE  
FB  
ROUT/2  
DATA (B)  
CONTROL (B)  
OUTPUT  
DRIVER (B)  
OVER VOLTAGE  
CLAMPS  
CURRENT  
REGULATOR  
V1  
Not included on HI-8383  
STROBE  
B
-V  
GND  
C
B
OUT  
Figure 2. FUNCTIONAL BLOCK DIAGRAM  
HOLT INTEGRATED CIRCUITS  
2