HI-3210
BLOCK DIAGRAM
Host CPU
MINTACK
MINT
ARINC 429
BIT MATCH
ARXBIT7
ARXBIT6
ARXBIT5
ARXBIT4
ARXBIT3
ARXBIT2
ARXBIT1
ARXBIT0
ARINC 429
RECEIVE DATA
MEMORY 0
1K x 8
HCSB
HSCLK
HMOSI
HMISO
ARINC 429
Interrupt Handler
AACK
AINT
SPI
Programmable
Interrupts
4 x ARINC 429 Transmit Buses
ARINC 429
Descriptor Table 0
ARINC 429
TRANSMIT
SCHEDULER 0
TRANSMITTER 0
8 x ARINC 429 Receive Buses
RECEIVER 0
FILTER
TABLE 0
TRANSMIT TIMER
CHANNEL 0
CHANNEL 1
CHANNEL 2
CHANNEL 3
32 x 32 FIFO
LABEL
FILTER
CHANNEL 0
CHANNEL 1
CHANNEL 2
CHANNEL 3
CHANNEL 4
CHANNEL 5
CHANNEL 6
CHANNEL 7
Message 32
“
“
“
Message 2
Message 1
EEPROM
SPI
HI-3210
ECSB
ESCLK
EMOSI
EMISO
Auto-Initialization
EEPROM
HOLT INTEGRATED CIRCUITS
2