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HI-3210PQI 参数 Datasheet PDF下载

HI-3210PQI图片预览
型号: HI-3210PQI
PDF下载: 下载PDF文件 查看货源
内容描述: ARINC 429数据管理引擎/八通道接收器/发射器四 [ARINC 429 DATA MANAGEMENT ENGINE / Octal Receiver / Quad Transmitter]
分类和应用: 微控制器和处理器串行IO控制器通信控制器外围集成电路
文件页数/大小: 42 页 / 159 K
品牌: HOLTIC [ HOLT INTEGRATED CIRCUITS ]
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HI-3210  
RAM BUILT-IN SELF-TEST  
The HI-3210 offers a built-in self-test (BIST) feature which can be used to check RAM integrity. The BIST Control/Status  
Register is used to control the BISTfunction.All tests are destructive, overwriting data present before test commencement.  
ASS  
RBP  
AIL  
RBF  
X
2
BIST CONTROL/STATUS REGISTER  
(Address 0x8070)  
7
6
5
4
3
1
0
LSB  
MSB  
This register controls RAM built-in self-test. Bits 0,1 are Read Only. The remaining bits in this register are Read-Write but can  
be written only in MODE2:0 = 0x04.  
BIST Control Register bits provide a means for the host to perform RAM self-test at other times. Register bits 6:4 select RAM  
test type. Then bit 3 starts the selected RAM test, and bits 1:0 report a fail/pass result after test completion.  
Bit No.  
Mnemonic Interrupt Type  
7
RBFFAIL RAM BISTForce Failure.  
When this bit is asserted, RAM test failure is forced to verify that RAM BISTlogic is functional.  
6:4  
RBSEL2-0 RAM BISTSelect Bits 2-0.  
This 3-bit field selects the RAM BISTtest mode applied when the RBSTARTbit is set:  
RBSEL2:0 SELECTED RAM TEST  
000  
001  
010  
011  
100  
101  
110  
111  
Idle  
Pattern Test, described below  
Write 0x00 to RAM address range 0x0000 - 0x7FFF  
Read and verify 0x00 over RAM address range 0x0000 - 0x7FFF  
Write 0xFF to RAM address range 0x0000 - 0x7FFF  
Read and verify 0xFF over RAM address range 0x0000 - 0x7FFF  
Inc / Dec Test performs only steps 5 - 8 of the Pattern Test below  
Idle  
Description of the RAM BIST “PATTERN” test selected when register bits RBSEL2:0 =  
001:  
1. Write 0x00 to all RAM locations, 0x0000 through 0x7FFF  
2. Repeat the following sequence for each RAM location from 0x0000 through 0x7FFF:  
a. Read and verify 0x00  
b. Write then read and verify 0x55  
c. Write then read and verify 0xAA  
d. Write then read and verify 0x33  
e. Write then read and verify 0xCC  
f. Write then read and verify 0x0F  
g. Write then read and verify 0xF0  
h. Write then read and verify 0x00  
I. Write then read and verify 0xFF  
j. Write 0x00 then increment RAM address and go to step (a)  
3. Write 0xFF to all RAM locations, 0x0000 through 0x7FFF  
4. Repeat the following sequence for each RAM location from 0x0000 through 0x7FFF:  
a. Read and verify 0xFF  
b. Write then read and verify 0x55  
c. Write then read and verify 0xAA  
d. Write then read and verify 0x33  
e. Write then read and verify 0xCC  
HOLT INTEGRATED CIRCUITS  
30  
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