欢迎访问ic37.com |
会员登录 免费注册
发布采购

HI-3201PQIF 参数 Datasheet PDF下载

HI-3201PQIF图片预览
型号: HI-3201PQIF
PDF下载: 下载PDF文件 查看货源
内容描述: 航空电子数据管理引擎 [AVIONICS DATA MANAGEMENT ENGINE]
分类和应用: 微控制器和处理器串行IO控制器通信控制器外围集成电路电子航空局域网
文件页数/大小: 59 页 / 220 K
品牌: HOLTIC [ HOLT INTEGRATED CIRCUITS ]
 浏览型号HI-3201PQIF的Datasheet PDF文件第2页浏览型号HI-3201PQIF的Datasheet PDF文件第3页浏览型号HI-3201PQIF的Datasheet PDF文件第4页浏览型号HI-3201PQIF的Datasheet PDF文件第5页浏览型号HI-3201PQIF的Datasheet PDF文件第6页浏览型号HI-3201PQIF的Datasheet PDF文件第7页浏览型号HI-3201PQIF的Datasheet PDF文件第8页浏览型号HI-3201PQIF的Datasheet PDF文件第9页  
HI-3200, HI-3201
August 2013
AVIONICS DATA MANAGEMENT ENGINE /
ARINC 429 - CAN BUS BRIDGE
FEATURES
·
·
·
·
Eight ARINC 429 Receive channels
Four ARINC 429 Transmit channels
CAN Bus / ARINC 825 Interface
32KB on chip user-configurable data storage
memory
and CAN buses
GENERAL DESCRIPTION
The HI-3200 from Holt Integrated Circuits is a single chip
CMOS data management IC capable of managing, storing
and forwarding avionics data messages between eight
ARINC 429 receive channels, four ARINC 429 transmit
channels and a single CAN / ARINC 825 data bus.
The ARINC 429 and CAN buses may be operated inde-
pendently, allowing a host CPU to send and receive data
on multiple buses, or the HI-3200 can be programmed to
automatically re-format, re-label, re-packetize and re-
transmit data from ARINC 429 receive buses to ARINC
429 transmit buses, as well as from ARINC 429 to CAN or
CAN to ARINC 429.
A 32K x 8 on-board memory allows received data to be
logically organized and automatically updated as new
ARINC 429 labels or CAN frames are received.
An auto-initialization feature allows configuration informa-
tion to be up-loaded from an external EEPROM on reset to
facilitate rapid start-up or operation without a host CPU.
The HI-3200 interfaces directly with Holt’s HI-8448 octal
ARINC 429 receiver IC, HI-8596 or HI-8592 ARINC 429
line drivers and HI-3110 integrated CAN controller /
transceiver.
The HI-3201 is identical to the HI-3200 except it comes in
an 80-pin PQFP package with eight instead of two ARINC
429 bit monitor pins.
·
Programmable received data filtering for ARINC 429
·
Programmable transmission schedulers for periodic
ARINC 429 and CAN message broadcasting
·
Flexible protocol bridge ARINC 429 to CAN and
CAN to ARINC 429
·
SPI Host CPU interface
·
Auto-initialization feature allows power-on
configuration or independent operation without CPU
PIN CONFIGURATION
ARX2P
ARX1N
ARX1P
ARX0N
ARX0P
SCANEN
CMISO
READY
ESCLK
EMOSI
ECSB
EMISO
RUN
CCSB
ATXMSK
MRST
64
63
62
61
60
59
58
57
56
55
54
53
52
51
50
49
APPLICATION
CPU
ARINC 429
8 x Receive
HI-8448
AACK 1
CGP2 2
AINT 3
CSTAT 4
SCANSHIFT 5
ARX2N 6
ARX3P 7
VDD 8
GND 9
ARX3N 10
ARX4P 11
ARX4N 12
ARX5P 13
ARX5N 14
ARX6P 15
ARX6N 16
HI-3200PQI
&
HI-3200PQT
48
47
46
45
44
43
42
41
40
39
38
37
36
35
34
33
CMROUT
ATXSLP0
ATX0N
ATX0P
ATX1N
ATX1P
ATXSLP1
VDD
GND
COSC
ATXSLP2
ATX2N
ATX2P
ATX3N
ATX3P
ATXSLP3
HI-3110
CAN Bus
ARINC 429
4 x Transmit
HI-3200
64 - Pin Plastic Quad Flat Pack (PQFP)
(See ordering information for additional pin configurations)
(DS3200 Rev. D)
ARX7P
ARX7N
MODE0
CMOSI
MODE1
MCLK
MODE2
ARXBIT0
ARXBIT1
HMISO
HSCLK
HMOSI
HCSB
CSCLK
MINT
MINTACK
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
08/13