HI-3110
required in the usual way. While in this mode, any bus
activity is ignored. Loopback is activated by programming
the MODE<2:0> bits to <001> in the CTRL0 register.
TRANSCEIVER
The HI-3110 contains an integrated transceiver operating
from 5V and the line driver is capable of maintaining a
detectable signal for bus lengths well in excess of
recommended CAN 2.0B standards. The digital logic and IO
can be powered from 3.3V or 5V.
MONITOR MODE
Monitor mode (also known as listen-only or silent mode)
allows the HI-3110 to monitor all bus activity without
disturbing the bus. No messages or dominant bits (such as
ACK or active error frame bits) are transmitted to the bus
while in this mode. Also, the error counters are reset and
deactivated. Messages from the bus are received in the
same way as Normal Mode and messages that are not
acknowledged by another node on the bus are ignored i.e.
any frame containing an error will be ignored. Acceptance
filters can be set up to reject or accept specific messages
into the FIFO and all interrupt flags are set as required in the
usual way. Monitor mode is activated by programming the
MODE<2:0> bits to <010> in the CTRL0 register.
PROTECTION FEATURES
The BUS and SPLIT pins are protected against ESD to over
4KV (HBM) and from shorts between -58V to +58V
continuous, as specified in ISO 11898-5.
In addition, a Permanent Dominant Timeout protection is
implemented by means of an independent counter
monitoring the dominant transmission state and
automatically shutting off the transmission if it exceeds
typically 2ms.
SLEEP MODE
MODES OF OPERATION
The HI-3110 can be placed in a low power sleep mode if
there is no bus activity and the transmit FIFO is empty. In
this mode, the internal oscillator and all analog circuitry
(transceiver) are off, drawing typically less than 20mA. Note
that the SPI bus is active during sleep mode, so it is possible
for the host to communicate with the HI-3110 while it is
asleep (e.g. load transmit FIFOs). Sleep mode is exited by
selecting an alternative mode of operation, or automatic
wake up following bus activity can be enabled by setting the
WAKEUP bit in the CTRL0 register - in this case a low power
receiver monitors the bus for a detectable dominant bit..
The device will wake up in Monitor Mode. Note that it will
take a finite time for the oscillator and analog circuitry to
come back on line. Since the internal oscillator takes a finite
time to wake up, the message which caused the wake-up
may not be stored.
The HI-3110 supports five modes of operation, namely,
Initialization Mode, Normal Mode, Loopback Mode, Monitor
Mode and Sleep Mode.
INITIALIZATION MODE
Initialization mode is used to configure the device before
normal operation. Bit timing registers and acceptance
filters and masks can only be modified in this mode.
Initialization mode is the default mode following RESET and
can also be activated by programming the MODE<2:0> bits
to <1xx> in the CTRL0 register. Switching to Initialization
mode resets the receiver and transmitter. During
initialization mode, the error counters are held reset.
NORMALMODE
Sleep mode is activated by programming the MODE<2:0>
bits to <011> in the CTRL0 register. However, the actual
mode change will only occur whenever the CAN bus is quiet.
If the chip is transmitting, the mode change is delayed until
the transmission is complete. If there is bus activity, the
mode change is delayed until the receiver protocol control
detects an inter-message gap.
Normal mode is the standard operating mode of the HI-3110.
In this mode, the HI-3110 can transmit, receive and
acknowledge messages from the CAN bus, handling all
aspects of the CAN protocol. Normal mode is activated by
programming the MODE<2:0> bits to <000> in the CTRL0
register.
LOOPBACK MODE
CAN PROTOCOLOVERVIEW
Loopback mode is used for self-test. The transceiver digital
input is fed back to the receiver without being transmitted to
the bus. Messages are transmitted from the transmit FIFO
in the usual way and received by the receive FIFO as if they
were received from a remote node on the bus.
The HI-3110 supports Standard, Extended and Remote
Frames, as defined in the CAN specification IS0 11898-
1:2003(E) (also known as CAN 2.0B).
BIT ENCODING
Acceptance filters can be set up to accept or reject specific
messages into the FIFO and all interrupt flags are set as
CAN frames are encoded according to the Non-Return-To-
Zero (NRZ) method with bit stuffing. NRZ means that the
HOLT INTEGRATED CIRCUITS
5
HOLTIC [ HOLT INTEGRATED CIRCUITS ]
