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HI-3110PCMF 参数 Datasheet PDF下载

HI-3110PCMF图片预览
型号: HI-3110PCMF
PDF下载: 下载PDF文件 查看货源
内容描述: 航空电子与CAN收发器集成控制器 [Avionics CAN Controller with Integrated Transceiver]
分类和应用: 电子控制器航空
文件页数/大小: 53 页 / 178 K
品牌: HOLTIC [ HOLT INTEGRATED CIRCUITS ]
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HI-3110  
generated bit level is constant during the total bit time and  
The data field is followed by the 16-bit Cyclic Redundancy  
Check (CRC) field. This is used to check transmission  
errors by computing a 15-bit CRC sequence from the  
previous bit stream (SOF, arbitration field, control field and  
data field, excluding stuff bits). The last bit in the CRC field is  
the CRC delimiter bit (always recessive).  
consecutive bits do not return to a neutral or rest condition.  
This means that a bit stream of “1s” or “0”s appears  
continuous on the bus. A logic “0” is called a dominant bit  
and a logic “1” is called a recessive bit.  
Bit stuffing is used to ensure frequent enough transitions  
occur to achieve synchronization. Every time a transmitter  
detects five consecutive bits of the same polarity in the bit  
stream to be transmitted, it inserts a bit of opposite polarity  
into the actual transmitted bit stream.  
After the CRC field is the Acknowledge Field (ACK Field).  
The first bit is the ACK Slot bit. A transmitting node sends a  
recessive bit (logic 1) during the ACK slot. Any node which  
receives the message error-free acknowledges the  
reception by placing a dominant bit (logic 0) in the ACK slot,  
over-writing the recessive bit of the transmitter. The final bit  
in the ACK field is a recessive ACK delimiter bit. Therefore,  
the dominant ACK slot bit is surrounded on each side by a  
recessive bit.  
This bit stuffing rule applies to the Start-of-Frame field,  
arbitration field, control field, data field and CRC sequence.  
The CRC delimiter,ACK field and End-Of-Frame fields are of  
fixed form and not stuffed (see below for definition of these  
fields). Furthermore, Error frames and Overload frames are  
also of fixed form and not stuffed.  
Each data frame is delimited by an End-Of-Frame field  
(EOF). The EOF consists of seven recessive bits.  
An example of how the bits in a stuffed bit stream might look  
is shown below.  
Following the EOF, there is a gap to the next frame called the  
Interframe Space (IFS) . The IFS consists of two bit fields,  
Intermission and Bus-Idle. The Intermission consists of  
three recessive bits, however the following notes apply:  
a) detection of a dominant bit on the bus at the third slot is  
interpreted as a SOF,  
00101011111O0000I1100000I11000  
0 = dominant bit, O = dominant stuffed bit.  
1 = recessive bit, I = recessive stuffed bit.  
b) detection of a dominant bit in either the first or second  
slots results in generation of an overload frame (see below).  
MESSAGE FRAMES  
STANDARD DATAFRAME  
The bus idle period is of arbitrary length and consists of  
recessive bits. A dominant bit detected during this period is  
interpreted as a SOF.  
The standard data frame is shown in figure 2. The frame  
starts with a Start-of-Frame (SOF) bit. This is a dominant bit  
that identifies the start of the data frame on the bus.  
EXTENDED DATAFRAME  
The SOF is followed by the 12-bit arbitration field. The  
arbitration field consists of an 11-bit identifer, ID28 - ID18,  
and the Remote Transmission Request (RTR) bit. The RTR  
bit is used to distinguish between a data frame (RTR bit  
dominant, logic 0) and a remote frame (RTR bit recessive,  
logic 1).  
The extended data frame is shown in figure 3. In this frame  
format, SOF is followed by a 32-bit arbitration field consisting  
of a 29-bit identifier, ID28 - ID0. The first 11 most significant  
bits of the ID are know as the base identifier. This is followed  
by the Substitute Remote Request (SRR) bit, which is  
defined as recessive. Following the SRR bit is the IDE bit,  
which is defined as recessive for extended data frames.  
Note that the SRR bit is in the same slot as the RTR bit of the  
standard frame and the IDE bits are also in corresponding  
slots. This means if standard and extended identifier data  
frames with identical base identifiers are transmitted  
simultaneously, the standard identifier data frame will win  
arbitration (see BitwiseArbitration section below).  
Following the arbitration field is the 6-bit control field. The  
first bit of the control field is the Identifier Extension flag bit  
(IDE). This is used to distinguish between standard and  
extended identifiers and must be dominant (logic 0) for  
standard data frames. The next bit, r0, is specified by the  
CAN protocol as a reserved bit for future expansion. This bit  
must be transmitted dominant, but receivers must be  
capable of receiving either a dominant or recessive bit. The  
final 4 bits of the control field make up the data length code  
(DLC). The binary value of this 4-bit field specifies the  
number of data bytes in the data payload (0 - 8 bytes). Note:  
All binary combinations greater than or equal to <1 0 0 0>  
specify 8 bytes of data.  
The SRR and IDE bits are followed by the remaining 18 bits  
of the identifier (extended ID) and the last bit of the  
arbitration field is the RTR bit. The RTR bit has the same  
function as in the standard frame format.  
Following the arbitration field is the 6-bit control field. The  
first two bits, r1 and r0, are specified by the CAN protocol as  
reserved bits for future expansion. Both these bits must be  
transmitted dominant, but receivers must be able to receive  
all combinations of dominant or recessive bits. The final 4  
bits of the control field is the data length code (DLC). The  
After the control field is the data field, which contains a data  
payload equal to the number of bytes specified by the DLC  
(see note above).  
HOLT INTEGRATED CIRCUITS  
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