HI-3182PSx-N, HI-3185PSx-N
FUNCTIONAL DESCRIPTION
The SYNC and CLOCK inputs establish data synchronization
utilizing two AND gates, one for each data input (figure 2).
Each logic input is TTL/CMOS compatible.
Figure 1 illustrates a typical ARINC 429 bus application.
Three power supplies are necessary to operate the HI-318X;
typically +15V, -15V and +5V. The chip also works with ±12V
supplies. The +5V supply can also provide a reference
voltage that determines the output voltage swing. The
differential output voltage swing will equal 2V
REF
. If a value of
V
REF
other than +5V is needed, a separate +5V power supply
is required for pin V
1
.
With the DATA (A) input at a logic high and DATA (B) input at a
logic low, A
OUT
will switch to the +V
REF
rail and B
OUT
will
switch to the -V
REF
rail (ARINC HIGH state). With both data
input signals at a logic low state, the outputs will both switch to
0V (ARINC NULL state).
The driver output impedance, R
OUT
, is nominally 75 ohms.
The rise and fall times of the outputs can be calibrated through
the selection of two external capacitor values that are
connected to the C
A
and C
B
input pins. Typical values for
high-speed operation (100KBPS) are C
A
= C
B
= 75pF and for
low-speed operation (12.5 to 14KBPS) C
A
= C
B
= 500pF.
The C
A
and C
B
pins swing between +5V and ground allowing
the switching of capacitor values with an external single-
supply analog switch.
The ARINC outputs of the HI-3182, are protected by internal
fuses capable of sinking between 800 - 900 mA for short
periods of time (125
m
s).
The Vref pin has an internal pull-up resistor to V+, allowing the
use of a simple external zener diode to set the reference
voltage.
POWER SUPPLY SEQUENCING
The power supplies should be controlled to prevent large
currents during supply turn-on and turn-off. The
recommended sequence is +V followed by V
1
, always
ensuring that +V is the most positive supply. The -V supply is
not critical and can be asserted at any time.
+5V
+15V
V
REF
DATA (A)
V1
SYNC
CLOCK
A
OUT
+V
-V
INPUTS
DATA (B)
CA
CB
GND
TO ARINC BUS
B
OUT
-15V
Figure 1.
ARINC 429 BUS APPLICATION
V
REF
+V
C
A
A
OUT
DATA (A)
LEVEL SHIFTER
AND SLOPE
CONTROL (A)
CLOCK
24.5W
OUTPUT
DRIVER (A)
C
L
SYNC
LEVEL SHIFTER
AND SLOPE
CONTROL (B)
24.5W
OUTPUT
DRIVER (B)
13W
R
L
13W
F
A
F
B
DATA (B)
V
1
CURRENT
REGULATOR
Shorted on
HI-3185PSx-N
GND
-V
C
B
B
OUT
Figure 2.
FUNCTIONAL BLOCK DIAGRAM
HOLT INTEGRATED CIRCUITS
2
HOLTIC [ HOLT INTEGRATED CIRCUITS ]
