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HI-2130 参数 Datasheet PDF下载

HI-2130图片预览
型号: HI-2130
PDF下载: 下载PDF文件 查看货源
内容描述: 单封装MIL -STD -1553 / MIL -STD -1760 3.3V BC / MT / RT集成变形金刚 [Single Package MIL-STD-1553 / MIL-STD-1760 3.3V BC / MT / RT with Integrated Transformers]
分类和应用:
文件页数/大小: 7 页 / 1000 K
品牌: HOLTIC [ HOLT INTEGRATED CIRCUITS ]
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January 2013
Single Package MIL-STD-1553 / MIL-STD-1760
3.3V BC / MT / RT with Integrated Transformers
FEATURES
Combined functionality of HI-6130 and HI-6131
in a single package with integrated transformers
Smallest footprint MIL-STD-1553
available (includes transformers)
solution
HI-2130
Extended temperature range, -55ºC to +125ºC,
with optional burn-in
GENERAL DESCRIPTION
The HI-2130 provides a 3.3V fully integrated interface
between a host processor and a MIL-STD-1553 /
MIL-STD-1760 bus. It combines the functionality of Holt’s
HI-6130 16-bit parallel bus interface and HI-6131 SPI
devices, integrating MIL-STD-1553 protocol logic, dual
transceivers and dual transformers in a single compact
15 x 15mm package. The HI-2130 die is hermetically
sealed in a ceramic substrate and dual transformers are
mounted onto the same package. Two package options
are offered, namely BGA and PGA (see “Ordering
The device includes the entire signal I/O set of HI-6130
and HI-6131, with the addition of a new input signal for
selecting parallel bus or SPI host interface. Two pairs
of transformer output signals connect directly to the
MIL-STD-1553 Bus A and Bus B stubs.
The part is available in Industrial -40 C to +85 C, or
o
o
Extended, -55 C to +125 C temperature ranges. Optional
burn-in is available on the extended temperature range.
Refer to the HI-6130 datasheet for full functional
description and operation.
HI-2130
o
o
Hermetically sealed die improves reliability and
achieves MSL 1
Less expensive than traditional multi-chip
modules
• DO-254 certifiable
Concurrent multi-terminal operation (BC, MT, 1 or
2 independent RTs)
Two host interface options in one package: 16-bit
parallel bus or 4-wire SPI
64K bytes on-chip RAM with error detection/
correction option
Autonomous terminal operation requires minimal
host intervention
Shared MIL-STD-1553 bus interface reduces
circuit complexity and circuit board area.
Fully programmable Bus Controller with 28 op
code instruction set
Simple Monitor Terminal (SMT) Mode records
commands and data separately, with 16-bit or
48-bit time tagging
IRIG Monitor Terminal (IMT) Mode supports
IRIG-106 Chapter 10 packet format. Complete
IRIG-106 data packets including full packet
headers and trailers can be generated
Independent time-tag counters for all terminals
with 32-bit option for Bus Controller and 48-bit
option for Monitor Terminal
64-Word Interrupt Log Buffer queues the most
recent 32 interrupts. Hardware-assisted interrupt
decoding quickly identifies interrupt sources
Built-in self-test for protocol logic, digital signal
paths and internal RAM
Optional self-initialization at reset uses external
serial EEPROM
o
o
Two temperature ranges: -40 C to +85 C, or
o
o
-55 C to +125 C
64K Byte
Shared RAM
External Serial
Flash EEPROM
Interface
Transformers
BC
RT
RT
MT
Transceiver
A
MIL-STD-1553 Protocol &
Memory Management
Transceiver
B
DS2130 Rev. B
HOLT INTEGRATED CIRCUITS
www.holtic.com
1
01/13