HI-1567, HI-1568
PIN DESCRIPTIONS
PIN
(DIP/ESOIC)
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
SYMBOL
VDDA
BUSA
BUSA
RXENA
GNDA
VDDB
BUSB
BUSB
RXENB
GNDB
RXB
RXB
TXINHB
TXB
TXB
RXA
RXA
TXINHA
TXA
TXA
FUNCTION
power supply
analog output
analog output
digital input
power supply
power supply
analog output
analog output
digital input
power supply
digital output
digital output
digital input
digital input
digital input
digital output
digital output
digital input
digital input
digital input
+5 volt power for channel A
DESCRIPTION
MIL-STD-1533 bus driver A, positive signal
MIL-STD-1553 bus driver A, negative signal
Receiver A enable. If low, forces RXA and RXA low (HI-1567) or High (HI-1568)
Ground for channel A
+5 volt power for channel B
MIL-STD-1533 bus driver B, positive signal
MIL-STD-1553 bus driver B, negative signal
Receiver B enable. If low, forces RXB and RXB low (HI-1567) or High (HI-1568)
Ground for channel B
Receiver B output, inverted
Receiver B output, non-inverted
Transmit inhibit, channel B. If high BUSB, BUSB disabled
Transmitter B digital data input, non-inverted
Transmitter B digital data input, inverted
Receiver A output, inverted
Receiver A output, non-inverted
Transmit inhibit, channel A. If high BUSA, BUSA disabled
Transmitter A digital data input, non-inverted
Transmitter A digital data input, inverted
FUNCTIONAL DESCRIPTION
The HI-1567 family of data bus transceivers contain differ-
ential voltage source drivers and differential receivers.
They are intended for applications using a MIL-STD-1553
A/B data bus. The device produces a trapezoidal output
waveform during transmission.
TRANSMITTER
Data input to the device’s transmitter section is from the
complementary CMOS /TTL inputs TXA/B and TXA/B.
The transmitter accepts Manchester II bi-phase data and
converts it to differential voltages on BUSA/B and BUSA/B.
The transceiver outputs are either direct or transformer
coupled to the MIL-STD-1553 data bus. Both coupling
methods produce a nominal voltage on the bus of 7.5 volts
peak to peak.
The transmitter is automatically inhibited and placed in the
high impedance state when both TXA/B and TXA/B are ei-
ther at a logic “1” or logic “0” simultaneously. A logic “1” ap-
plied to the TXINHA/B input will force the transmitter to the
high impedance state, regardless of the state of TXA/B and
TXA/B.
RECEIVER
The receiver accepts bi-phase differential data from the
MIL-STD-1553 bus through the same direct or transformer
coupled interface as the transmitter. The receiver’s differ-
ential input stage drives a filter and threshold comparator
that produces CMOS/TTL data at the RXA/B and RXA/B
output pins.
Each set of receiver outputs can be independently forced
to a logic "0" (HI-1567) or logic “1” (HI-1568) by setting
RXENA or RXENB low.
MIL-STD-1553 BUS INTERFACE
A direct coupled interface (see Figure 2) uses a 1:2.5 ratio
isolation transformer and two 55 ohm isolation resistors
between the transformer and the bus.
In a transformer coupled interface (see Figure 3), the
transceiver is connected to a 1:1.79 isolation transformer
which in turn is connected to a 1:1.4 coupling transformer.
The transformer coupled method also requires two
coupling resistors equal to 75% of the bus characteristic
impedence (Zo) between the coupling transformer and the
bus.
HOLT INTEGRATED CIRCUITS
2
HOLTIC [ HOLT INTEGRATED CIRCUITS ]
