18
3
Series of Decoders
Block Diagram
Note: The address/data pins are available in various combinations
(refer to the address/data table).
Pin Description
In ter n a l
Con n ection
P in Na m e I/O
Descr ip t ion
TRANSMISSION Input pins for address A0~A17 setting
A0~A17
I
GATE
CMOS OUT
CMOS IN
CMOS OUT
OSCILLATOR
OSCILLATOR
—
They can be externally set to VDD, VSS, or left open.
D10~D17
DIN
O
I
Output data pins
Serial data input pin
VT
O
I
Valid transmission, active high
Oscillator input pin
OSC1
OSC2
VSS
O
I
Oscillator output pin
Negative power supply (GND)
Positive power supply
VDD
I
—
3
2nd Oct ’97
HOLTEK [ HOLTEK SEMICONDUCTOR INC ]
