HT48R063B/064B/065B/066B
Internal Low Speed Oscillator - LIRC
Note that CLKMOD is only valid in HIRC+LXT oscillator
configuration.
The LIRC is a fully self-contained free running on-chip
RC oscillator with a typical frequency of 13kHz at 5V re-
quiring no external components. When the device en-
ters the Idle/Sleep Mode, the system clock will stop
running but the WDT oscillator continues to free-run and
to keep the watchdog active. However, to preserve
power in certain applications the LIRC can be disabled
via a configuration option.
·
Operating Mode Control
OSC1/OSC2 Configuration
HIRC + LXT
ERC HIRC
Operating
Mode
HXT
HIRC
Run
LXT
Run
Run
Run
Normal
Slow
Run
¾
Run
¾
Run
¾
Stop
Stop
Operating Modes
Sleep
Stop
Stop
Stop
By using the LXT low frequency oscillator in combina-
tion with a high frequency oscillator, the system can be
selected to operate in a number of different modes.
These Modes are Normal, Slow, Idle and Sleep.
²¾² unimplemented
Mode Switching
The devices are switched between one mode and an-
other using a combination of the CLKMOD bit in the
CTRL0 register and the HALT instruction. The CLKMOD
bit chooses whether the system runs in either the Nor-
mal or Slow Mode by selecting the system clock to be
sourced from either a high or low frequency oscillator.
The HALT instruction forces the system into either the
Idle or Sleep Mode, depending upon whether the LXT
oscillator is running or not. The HALT instruction oper-
ates independently of the CLKMOD bit condition.
Mode Types and Selection
The higher frequency oscillators provide higher perfor-
mance but carry with it the disadvantage of higher
power requirements, while the opposite is of course true
for the lower frequency oscillators. With the capability of
dynamically switching between fast and slow oscillators,
the device has the flexibility to optimise the perfor-
mance/power ratio, a feature especially important in
power sensitive portable applications.
When a HALT instruction is executed and the LXT oscil-
lator is not running, the system enters the Sleep mode
the following conditions exist:
For these devices, if the LXT oscillator is used then the
internal RC oscillator, HIRC, must be used as the high
frequency oscillator. If the HXT or the ERC oscillator is
chosen as the high frequency system clock then the
LXT oscillator cannot be used for sharing the same pins.
The CLKMOD bit in the CTRL0 register can be used to
switch the system clock from the high speed HIRC oscil-
lator to the low speed LXT oscillator. When the HALT in-
struction is executed and the device enters the
Idle/Sleep Mode the LXT oscillator will always continue
to run. For these devices the LXT crystal is connected to
the OSC1/OSC2 pins and LXT will always run (the
LXTEN bit is not used).
·
·
·
The system oscillator will stop running and the appli-
cation program will stop at the ²HALT² instruction.
The Data Memory contents and registers will maintain
their present condition.
The WDT will be cleared and resume counting if the
WDT clock source is selected to come from the WDT
or LXT oscillator. The WDT will stop if its clock source
originates from the system clock.
·
·
The I/O ports will maintain their present condition.
In the status register, the Power Down flag, PDF, will
be set and the Watchdog time-out flag, TO, will be
cleared.
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System Clock Configurations
Rev. 1.00
27
April 7, 2011
HOLTEK [ HOLTEK SEMICONDUCTOR INC ]
