HT48R05A-1/HT48C05/HT48R06A-1/HT48C06/HT48R08A-1
An extra option load time delay is added during system reset (power-up, WDT time-out at normal mode or RES reset).
The functional unit chip reset status are shown below.
Program Counter
Interrupt
000H
Disable
Prescaler
Clear
WDT
Clear. After master reset, WDT begins counting
Timer/Event Counter
Input/Output Ports
Stack Pointer
Off
Input mode
Points to the top of the stack
The states of the registers is summarized in the table.
Reset
(Power-on)
WDT time-out RES Reset
(Normal Operation) (Normal Operation)
RES Reset
(HALT)
WDT Time-out
(HALT)*
Register
Program
Counter
000H
000H
000H
000H
000H
MP
-xxx xxxx
xxxx xxxx
xxxx xxxx
--xx xxxx
0000 0111
xxxx
-uuu uuuu
uuuu uuuu
uuuu uuuu
--uu uuuu
0000 0111
--1u uuuu
--00 -000
xxxx xxxx
00-0 1000
1111 1111
1111 1111
---- -111
-uuu uuuu
uuuu uuuu
uuuu uuuu
--uu uuuu
0000 0111
--uu uuuu
--00 -000
xxxx xxxx
00-0 1000
1111 1111
1111 1111
---- -111
-uuu uuuu
uuuu uuuu
uuuu uuuu
--uu uuuu
0000 0111
--01 uuuu
--00 -000
xxxx xxxx
00-0 1000
1111 1111
1111 1111
---- -111
-uuu uuuu
uuuu uuuu
uuuu uuuu
--uu uuuu
uuuu uuuu
--11 uuuu
--uu -uuu
uuuu uuuu
uu-u uuuu
uuuu uuuu
uuuu uuuu
---- -uuu
ACC
TBLP
TBLH
WDTS
STATUS
INTC
TMR
TMRC
PA
--00 -000
xxxx xxxx
00-0 1000
1111 1111
1111 1111
---- -111
PAC
PB
PBC
PC
---- -111
---- -111
---- -111
---- -111
---- -uuu
---- --11
---- --11
---- --11
---- --11
---- --uu
PCC
---- --11
---- --11
---- --11
---- --11
---- --uu
Note:
²*² means ²warm reset²
²u² means ²unchanged²
²x² means ²unknown²
Timer/Event Counter
The timer/event counter can generate PFD signal by us-
ing external or internal clock and PFD frequency is de-
termine by the equation fINT/[2´(256-N)].
A timer/event counter (TMR) is implemented in the
microcontroller. The timer/event counter contains an 8-bit
programmable count-up counter and the clock may come
from an external source or the system clock.
There are 2 registers related to the timer/event counter;
TMR ([0DH]), TMRC ([0EH]). Two physical registers are
mapped to TMR location; writing TMR makes the start-
ing value be placed in the timer/event counter preload
register and reading TMR retrieves the contents of the
timer/event counter. The TMRC is a timer/event counter
control register, which defines some options.
Using external clock input allows the user to count exter-
nal events, measure time internals or pulse widths, or
generate an accurate time base. While using the inter-
nal clock allows the user to generate an accurate time
base.
Rev. 1.51
12
December 30, 2008
HOLTEK [ HOLTEK SEMICONDUCTOR INC ]
