HT46R01B/02B/01N/02N
HT48R01B/02B/01N/02N
Note:
I/T: Input type
O/T: Output type
OPT: Optional by configuration option (CO) or register option
PWR: Power
CO: Configuration option
ST: Schmitt Trigger input
CMOS: CMOS output
The important point to note here is that the PB0 and PB1 pads will not be bounded to pins in the 10-pin MSOP
package. These two pads default to an input state, the designer should set the register PBPU to pull high op-
tions. In this way, these two internal pads can be pulled up in order to prevent input pin floating power con-
sumption.
HT46R01N/HT46R02N
Pin Name
Function
PA0
PA0/AN0
AN0
PA1
PA1/PFD/AN1
PFD
AN1
PA2
PA2/TC0/AN2
TC0
AN2
PA3
PA3/INT/AN3
INT
AN3
PA4
PA4/TC1/PWM
TC1
PWM
PA5
PA5/OSC2
OSC2
PA6
PA6/OSC1
OSC1
PA7
PA7/RES
RES
PB0
PB1
VDD
VSS
PB0
PB1
VDD
VSS
CO
PBPU
PBPU
¾
¾
ST
ST
ST
PWR
PWR
OPT
PAPU
PAWK
ADCR
PAPU
PAWK
CTRL0
ADCR
PAPU
PAWK
¾
ADCR
PAPU
PAWK
¾
ADCR
PAPU
PAWK
¾
CTRL0
PAPU
PAWK
CO
PAPU
PAWK
CO
PAWK
I/T
ST
AN
ST
¾
AN
ST
ST
AN
ST
ST
AN
ST
ST
¾
ST
¾
ST
OSC
ST
O/T
Description
CMOS General purpose I/O. Register enabled pull-up and wake-up.
¾
A/D channel 0
CMOS General purpose I/O. Register enabled pull-up and wake-up.
CMOS PFD output
¾
A/D channel 1
CMOS General purpose I/O. Register enabled pull-up and wake-up.
¾
¾
External Timer 0 clock input
A/D channel 2
CMOS General purpose I/O. Register enabled pull-up and wake-up.
¾
¾
External interrupt input
A/D channel 3
CMOS General purpose I/O. Register enabled pull-up and wake-up.
¾
External Timer 1 clock input
CMOS PWM output
CMOS General purpose I/O. Register enabled pull-up and wake-up.
OSC
Oscillator pin
CMOS General purpose I/O. Register enabled pull-up and wake-up.
¾
Oscillator pin
NMOS General purpose I/O. Register enabled wake-up.
¾
Reset input
CMOS General purpose I/O. Register enabled.
CMOS General purpose I/O. Register enabled.
¾
¾
Power supply
Ground
Rev.1.00
5
December 15, 2009