HT46R068B/HT46R069B
Enhanced A/D Type 8-bit OTP MCU
I2C Bus Read/Write Signal
The SRW bit in the SIMC1 register defines whether the slave device wishes to read data from the
I2C bus or write data to the I2C bus. The slave device should examine this bit to determine if it is
to be a transmitter or a receiver. If the SRW flag is "1" then this indicates that the master device
wishes to read data from the I2C bus, therefore the slave device must be setup to send data to the
I2C bus as a transmitter. If the SRW flag is "0" then this indicates that the master wishes to send
data to the I2C bus, therefore the slave device must be setup to read data from the I2C bus as a
receiver.
I2C Bus Slave Address Acknowledge Signal
After the master has transmitted a calling address, any slave device on the I2C bus, whose own in-
ternal address matches the calling address, must generate an acknowledge signal. The acknowledge
signal will inform the master that a slave device has accepted its calling address. If no acknowl-
edge signal is received by the master then a STOP signal must be transmitted by the master to end
the communication. When the HAAS flag is high, the addresses have matched and the slave device
must check the SRW flag to determine if it is to be a transmitter or a receiver. If the SRW flag is
high, the slave device should be setup to be a transmitter so the HTX bit in the SIMC1 register
should be set to "1". If the SRW flag is low, then the microcontroller slave device should be setup
as a receiver and the HTX bit in the SIMC1 register should be set to "0".
I2C Bus Data and Acknowledge Signal
The transmitted data is 8-bits wide and is transmitted after the slave device has acknowledged
receipt of its slave address. The order of serial bit transmission is the MSB first and the LSB last.
After receipt of 8-bits of data, the receiver must transmit an acknowledge signal, level "0", before
it can receive the next data byte. If the slave transmitter does not receive an acknowledge bit signal
from the master receiver, then the slave transmitter will release the SDA line to allow the master
to send a STOP signal to release the I2C Bus. The corresponding data will be stored in the SIMD
register. If setup as a transmitter, the slave device must first write the data to be transmitted into
the SIMD register. If setup as a receiver, the slave device must read the transmitted data from the
SIMD register.
When the slave receiver receives the data byte, it must generate an acknowledge bit, known as
TXAK, on the 9th clock. The slave device, which is setup as a transmitter will check the RXAK bit
in the SIMC1 register to determine if it is to send another data byte, if not then it will release the
SDA line and await the receipt of a STOP signal from the master.
Rev. 1.00
94
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HOLTEK [ HOLTEK SEMICONDUCTOR INC ]
