HT46R068B/HT46R069B
Enhanced A/D Type 8-bit OTP MCU
I2C Interface
The I2C interface is used to communicate with external peripheral devices such as sensors,
EEPROM memory etc. Originally developed by Philips, it is a two line low speed serial interface
for synchronous serial data transfer. The advantage of only two lines for communication, relatively
simple communication protocol and the ability to accommodate multiple devices on the same bus
has made it an extremely popular interface type for many applications.
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I2C Mater Slave Bus Connection
I2C Interface Operation
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The I2C serial interface is a two line interface, a serial data line, SDA, and serial clock
line, SCL. As many devices may be connected together on the same bus, their outputs are
both open drain types. For this reason it is necessary that external pull-high resistors are
connected to these outputs. Note that no chip select line exists, as each device on the I2C
bus is identified by a unique address which will be transmitted and received on the I2C bus.
When two devices communicate with each other on the bidirectional I2C bus, one is
known as the master device and one as the slave device. Both master and slave can
transmit and receive data, however, it is the master device that has overall control of
the bus. For these devices, which only operates in slave mode, there are two methods
of transferring data on the I2C bus, the slave transmit mode and the slave receive mode.
There are several configuration options associated with the I2C interface. One of these is to
enable the function which selects the SIM pins rather than normal I/O pins. Note that if the
configuration option does not select the SIM function then the SIMEN bit in the SIMC0 register
will have no effect. A configuration option exists to allow a clock other than the system clock
to drive the I2C interface. Another configuration option determines the debounce time of the I2C
interface. This uses the internal clock to in effect add a debounce time to the external clock to
reduce the possibility of glitches on the clock line causing erroneous operation. The debounce
time, if selected, can be chosen to be either 1 or 2 system clocks.
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