HT46R068B/HT46R069B
Enhanced A/D Type 8-bit OTP MCU
Controlling the power on/off function of the A/D converter circuitry is implemented using the
value of the ADONB bit.
Although the A/D clock source is determined by the system clock fSYS, and by bits ADCS2,
ADCS1 and ADCS0, there are some limitations on the maximum A/D clock source speed that can
be selected. As the minimum value of permissible A/D clock period, tAD, is 0.5μs, care must be
taken for system clock speeds in excess of 4MHz. For system clock speeds in excess of 4MHz, the
ADCS2, ADCS1 and ADCS0 bits should not be set to "000". Doing so will give A/D clock periods
that are less than the minimum A/D clock period which may result in inaccurate A/D conversion
values. Refer to the following table for examples, where values marked with an asterisk * show
where, depending upon the device, special care must be taken, as the values may be less than the
specified minimum A/D Clock Period.
A/D Clock Period (tAD
)
ADCS2,
ADCS1,
ADCS2,
ADCS1,
ADCS2,
ADCS1,
ADCS2,
ADCS1,
ADCS2,
ADCS1,
ADCS2,
ADCS1,
ADCS2,
ADCS1,
fSYS
ADCS0=000 ADCS0=001 ADCS0=010 ADCS0=100 ADCS0=101 ADCS0=110 ADCS0=011,
(fSYS/2)
(fSYS/8)
(fSYS/32)
3ꢃμs
1ꢄμs
8μs
4μs
ꢃ.ꢄ7μs
(fSYS
)
(fSYS/4)
(fSYS/16)
1ꢄμs
8μs
4μs
ꢃμs
111
1MHz
ꢃMHz
4MHz
8MHz
1ꢃMHz
ꢃμs
1μs
500ns
250ns*
167ns*
8μs
4μs
ꢃμs
1μs
1μs
4μs
ꢃμs
1μs
500ns
333ns*
Undefined
Undefined
Undefined
Undefined
Undefined
500ns
250ns*
125ns*
83ns*
ꢄꢄ7ns
1μs
A/D Clock Period Examples
A/D Input Pins
All of the A/D analog input pins are pin-shared with the I/O pins on Port A, Port C and Port E.
Bits PCR15~PCR0 in the ANCSR0 and ANCSR1 registers, determine whether the input pins are
setup as normal input/output pins or whether they are setup as analog inputs. In this way, pins can
be changed under program control to change their function from normal I/O operation to analog
inputs and vice versa. Pull-high resistors, which are setup through register programming, apply
to the input pins only when they are used as normal I/O pins, if setup as A/D inputs the pull-high
resistors will be automatically disconnected. Note that it is not necessary to first setup the A/D pin
as an input in the PAC, PCC and PEC port control registers to enable the A/D input as when the
PCR15~PCR0 bits enable an A/D input, the status of the port control register will be overridden.
Summary of A/D Conversion Steps
The following summarises the individual steps that should be executed in order to implement an A/
D conversion process.
Step 1
●
●
●
Select the required A/D conversion clock by correctly programming bits ADCS2, ADCS1 and
ADCS0 in the register.
Step 2
Select which pins are to be used as A/D inputs and configure them as A/D input pins by correctly
programming the PCR15~PCR0 bits in the ANCSR0, ANCSR1 registers.
Step 3
Enable the A/D by clearing the ADONB in the ACSR register to zero.
Rev. 1.00
ꢄ7
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