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HT46R068B 参数 Datasheet PDF下载

HT46R068B图片预览
型号: HT46R068B
PDF下载: 下载PDF文件 查看货源
内容描述: 增强A / D型8位OTP MCU [Enhanced A/D Type 8-bit OTP MCU]
分类和应用:
文件页数/大小: 134 页 / 5896 K
品牌: HOLTEK [ HOLTEK SEMICONDUCTOR INC ]
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HT46R068B/HT46R069B  
Enhanced A/D Type 8-bit OTP MCU  
Input/Output Ports and Control Registers  
Within the area of Special Function Registers, the port PA, PB, etc data I/O registers and their  
associated control register PAC, PBC, etc play a prominent role. These registers are mapped to  
specific addresses within the Data Memory as shown in the Data Memory table. The data I/O  
registers, are used to transfer the appropriate output or input data on the port. The control registers  
specifies which pins of the port are set as inputs and which are set as outputs. To setup a pin as  
an input, the corresponding bit of the control register must be set high, for an output it must be  
set low. During program initialisation, it is important to first setup the control registers to specify  
which pins are outputs and which are inputs before reading data from or writing data to the I/  
O ports. One flexible feature of these registers is the ability to directly program single bits using  
the "SET [m].i" and "CLR [m].i" instructions. The ability to change I/O pins from output to input  
and vice versa by manipulating specific bits of the I/O control registers during normal program  
operation is a useful feature of these devices.  
STATUS Register  
Bit  
Name  
R/W  
7
6
5
TO  
R
4
PDF  
R
3
OV  
R/W  
X
2
Z
R/W  
X
1
AC  
R/W  
X
0
C
R/W  
X
POR  
0
0
"X" ꢀnknown  
Bit 7,6  
Unimplemented, read as "0"  
Bit 5  
Bit 4  
Bit 3  
TO: Watchdog Time-Out flag  
0: After power up or executing the "CLR WDT" or "HALT" instruction  
1: A watchdog time-out occured.  
PDF: Power down flag  
0: After power up or executing the "CLR WDT" instruction  
1: By executing the "HALT" instruction  
OV: Overflow flag  
0: no overflow  
1: an operation results in a carry into the highest-order bit but not a carry out of  
thehighest-order bit or vice versa.  
Bit 2  
Bit 1  
Z: Zero flag  
0: The result of an arithmetic or logical operation is not zero  
1: The result of an arithmetic or logical operation is not zero  
AC: Auxiliary flag  
0: no auxiliary carry  
1: an operation results in a carry out of the low nibbles in addition, or no borrow  
from the high nibble into the low nibble in subtraction  
Bit 0  
C: Carry flag  
0: no carry-out  
1: an operation results in a carry during an addition operation or if a borrow does  
not take place during a subtraction operation  
C is also affected by a rotate through carry instruction.  
Rev. 1.00  
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