HT46R068B/HT46R069B
Enhanced A/D Type 8-bit OTP MCU
CPL [m]
Complement Data Memoꢁꢂ
'
Descꢁiption
Each bit of the specified Data Memoꢁꢂ is logicallꢂ complemented (1 s
complement). Bits which pꢁevioꢀslꢂ contained a 1 aꢁe changed to 0 and vice
veꢁsa.
←
[m]
Opeꢁation
[m]
Z
Affected flag(s)
CPLA [m]
Complement Data Memoꢁꢂ with ꢁesꢀlt in ACC
'
Descꢁiption
Each bit of the specified Data Memoꢁꢂ is logicallꢂ complemented (1 s
complement). Bits which pꢁevioꢀslꢂ contained a 1 aꢁe changed to 0 and vice
veꢁsa. The complemented ꢁesꢀlt is stoꢁed in the Accꢀmꢀlatoꢁ and the contents of
the Data Memoꢁꢂ ꢁemain ꢀnchanged.
←
[m]
Opeꢁation
ACC
Z
Affected flag(s)
DAA [m]
Decimal-Adjꢀst ACC foꢁ addition with ꢁesꢀlt in Data Memoꢁꢂ
Descꢁiption
Conveꢁt the contents of the Accꢀmꢀlatoꢁ valꢀe to a BCD ( Binaꢁꢂ Coded Decimal)
valꢀe ꢁesꢀlting fꢁom the pꢁevioꢀs addition of two BCD vaꢁiables. If the low nibble
is greater than 9 or if AC flag is set, then a value of 6 will be added to the low
nibble. Otheꢁwise the low nibble ꢁemains ꢀnchanged. If the high nibble is gꢁeateꢁ
than 9 or if the C flag is set, then a value of 6 will be added to the high nibble.
Essentiallꢂꢅ the decimal conveꢁsion is peꢁfoꢁmed bꢂ adding 00Hꢅ 0ꢄHꢅ ꢄ0H oꢁ
66H depending on the Accumulator and flag conditions. Only the C flag may be
affected bꢂ this instꢁꢀction which indicates that if the oꢁiginal BCD sꢀm is gꢁeateꢁ
than 100ꢅ it allows mꢀltiple pꢁecision decimal addition.
←
←
←
←
Opeꢁation
[m]
[m]
[m]
[m]
C
ACC + 00H oꢁ
ACC + 0ꢄH oꢁ
ACC + ꢄ0H oꢁ
ACC + ꢄꢄH
Affected flag(s)
DEC [m]
Decꢁement Data Memoꢁꢂ
Descꢁiption
Opeꢁation
Data in the specified Data Memory is decremented by 1.
←
–
1
[m]
Z
[m]
Affected flag(s)
DECA [m]
Decꢁement Data Memoꢁꢂ with ꢁesꢀlt in ACC
Descꢁiption
Data in the specified Data Memory is decremented by 1. The result is stored in
the Accꢀmꢀlatoꢁ. The contents of the Data Memoꢁꢂ ꢁemain ꢀnchanged.
←
–
1
Opeꢁation
ACC
Z
[m]
Affected flag(s)
Rev. 1.00
113
�anꢀaꢁꢂ ꢃꢄꢅ ꢃ011