HT46R064D/065D/066D
Enhanced A/D Type 8-Bit OTP MCU with LED Driver
7+1 PWM Mode
Each full PWM cycle, as it is controlled by an 8-bit PWM register, has 256 clock periods. However, in
the 7+1 PWM mode, each PWM cycle is subdivided into two individual sub-cycles known as
modulation cycle 0 ~ modulation cycle 1, denoted as i in the table. Each one of these two sub-cycles
contains 128 clock cycles. In this mode, a modulation frequency increase of two is achieved. The 8-bit
PWM register value, which represents the overall duty cycle of the PWM waveform, is divided into two
groups. The first group which consists of bit1~bit7 is denoted here as the DC value. The second group
which consists of bit0 is known as the AC value. In the 7+1 PWM mode, the duty cycle value of each of
the two modulation sub-cycles is shown in the following table.
Parameter
AC (0~1)
DC (Duty Cycle)
DC+1
128
i<AC
Modulation cycle i
(i=0~1)
DC
i³AC
128
7+1 Mode Modulation Cycle Values
The following diagram illustrates the waveforms associated with the 7+1 mode PWM operation. It is
important to note how the single PWM cycle is subdivided into 2 individual modulation cycles,
numbered 0 and 1 and how the AC value is related to the PWM value.
7+1 PWM Mode
PWM Register for 7+1 Mode
Rev. 1.00
55
January 12, 2011