HT46R46/C46/R47/C47/R48A/C48A/R49
Pin Assignment
P A 3 /P F D
1
2
3
4
5
6
7
8
9
1 0
P A 3 /P F D
1
2
3
4
5
6
7
8
9
P A 3 /P F D
1
2
3
4
5
6
7
8
P A 2
P A 1
P A 0
P B 1 /A N 1
P B 0 /A N 0
V S S
P D 0 /P W M
1 6
1 5
1 4
1 3
1 2
1 1
1 0
9
P A 4 /T M R
P A 5 /IN T
P A 6
P A 7
O S C 2
O S C 1
V D D
R E S
P A 2
P A 1
P A 0
P B 3 /A N 3
P B 2 /A N 2
P B 1 /A N 1
P B 0 /A N 0
V S S
1 8
1 7
1 6
1 5
1 4
1 3
1 2
1 1
1 0
P A 4 /T M R
P A 5 /IN T
P A 6
P A 7
O S C 2
O S C 1
V D D
R E S
P D 0 /P W M
P A 2
P A 1
P A 0
P B 3 /A N 3
N C
P B 2 /A N 2
P B 1 /A N 1
P B 0 /A N 0
V S S
2 0
1 9
1 8
1 7
1 6
1 5
1 4
1 3
1 2
1 1
P A 4 /T M R
P A 5 /IN T
P A 6
P A 7
O S C 2
O S C 1
V D D
R E S
P D 0 /P W M
N C
P B 4
1
2
3
4
5
6
7
8
9
1 0
P A 3 /P F D
P A 2
P A 1
P A 0
P B 3 /A N 3
P B 2 /A N 2
P B 1 /A N 1
P B 0 /A N 0
V S S
2 0
1 9
1 8
1 7
1 6
1 5
1 4
1 3
1 2
1 1
P B 5
P A 4 /T M R
P A 5 /IN T
P A 6
P A 7
O S C 2
O S C 1
V D D
R E S
P D 0 /P W M
H T 4 6 R 4 6 /H T 4 6 C 4 6
H T 4 6 R 4 7 /H T 4 6 C 4 7
1 6 N S O P -A
H T 4 6 R 4 6 /H T 4 6 C 4 6
H T 4 6 R 4 7 /H T 4 6 C 4 7
1 8 D IP -A /S O P -A
H T 4 6 R 4 6 /H T 4 6 C 4 6
H T 4 6 R 4 7 /H T 4 6 C 4 7
2 0 S S O P -A
H T 4 6 R 4 8 A /H T 4 6 C 4 8 A
2 0 D IP -A /S O P -A
P B 5
P B 4
P B 5
P B 4
2
3
4
5
6
7
8
9
1 0
1 1
1 2
P A 3 /P F D
P A 2
P A 1
P A 0
P B 3 /A N 3
P B 2 /A N 2
P B 1 /A N 1
P B 0 /A N 0
V S S
P C 0
1
2 4
2 3
2 2
2 1
2 0
1 9
1 8
1 7
1 6
1 5
1 4
1 3
P B 6
P B 7
P A 4 /T M R
P A 5 /IN T
P A 6
P A 7
O S C 2
O S C 1
V D D
R E S
P D 0 /P W M
P C 1
P A 3 /P F D
1
2
3
4
5
6
7
8
9
1 0
P A 2
P A 1
P A 0
P B 3 /A N 3
P B 2 /A N 2
P B 1 /A N 1
P B 0 /A N 0
V S S
P C 0
2 0
1 9
1 8
1 7
1 6
1 5
1 4
1 3
1 2
1 1
P A 4 /T M R
P A 5 /IN T
P A 6
P A 7
O S C 2
O S C 1
V D D
R E S
P D 1 /P W M 1
P D 0 /P W M 0
P B 5
1
2
3
4
5
6
7
8
9
1 0
1 1
1 2
P B 4
P A 3 /P F D
P A 2
P A 1
P A 0
P B 3 /A N 3
P B 2 /A N 2
P B 1 /A N 1
P B 0 /A N 0
V S S
P C 0
2 4
2 3
2 2
2 1
2 0
1 9
1 8
1 7
1 6
1 5
1 4
1 3
P B 6
P B 7
P A 4 /T M R
P A 5 /IN T
P A 6
P A 7
O S C 2
O S C 1
V D D
R E S
P D 1 /P W M 1
P D 0 /P W M 0
P A 3 /P F D
P A 2
P A 1
P A 0
P B 3 /A N 3
P B 2 /A N 2
P B 1 /A N 1
9
P B 0 /A N 0
V S S
P C 0
P C 1
P C 2
8
7
6
5
4
3
2
1
2 8
2 7
2 6
2 5
2 4
2 3
2 2
2 1
2 0
1 0
1 1
1 2
1 3
1 4
1 9
1 8
1 7
1 6
1 5
P B 6
P B 7
P A 4 /T M R
P A 5 /IN T
P A 6
P A 7
O S C 2
O S C 1
V D D
R E S
P D 1 /P W M 1
P D 0 /P W M 0
P C 4
P C 3
H T 4 6 R 4 8 A /H T 4 6 C 4 8 A
2 4 S K D IP -A /S O P -A /S S O P -A
H T 4 6 R 4 9
2 0 D IP -A /S O P -A
H T 4 6 R 4 9
2 4 S K D IP -B /S O P -B
H T 4 6 R 4 9
2 8 S K D IP -A /S O P -A
Pin Description
HT46R46, HT46R47
Pin Name I/O
PA0~PA2
PA3/PFD
PA4/TMR
PA5/INT
PA6~PA7
PB0/AN0
PB1/AN1
PB2/AN2
PB3/AN3
Configuration
Option
Pull-high
Wake-up
PA3 or PFD
Description
Bidirectional 8-bit input/output port. Each individual pin on this port can be config-
ured as a wake-up input by a configuration option. Software instructions determine
if the pin is a CMOS output or Schmitt Trigger input. Configuration options deter-
mine which pins on the port have pull-high resistors. Pins PA3, PA4 and PA5 are
pin-shared with PFD, TMR and INT, respectively.
Bidirectional 4-bit input/output port. Software instructions determine if the pin is a
CMOS output or Schmitt Trigger input. Configuration options determine which pins
on the port have pull-high resistors. PB is pin-shared with the A/D input pins. The
A/D inputs are selected via software instructions. Once selected as an A/D input,
the I/O function and pull-high resistor options are disabled automatically.
I/O
I/O
Pull-high
PD0/PWM I/O
Bidirectional 1-bit input/output port. Software instructions determine if the pin is a
Pull-high
CMOS output or Schmitt Trigger input.
PD0 or PWM A configuration option determines if this pin has a pull-high resistor. The PWM out-
put is pin-shared with pin PD0 selected via a configuration option.
Crystal
or RC
¾
¾
¾
OSC1, OSC2 are connected to an external RC network or external crystal, deter-
mined by configuration option, for the internal system clock. If the RC system clock op-
tion is selected, pin OSC2 can be used to measure the system clock at 1/4 frequency.
Schmitt Trigger reset input. Active low.
Positive power supply
Negative power supply, ground
OSC1
OSC2
RES
VDD
VSS
Note:
I
O
I
¾
¾
1. Each pin on PA can be programmed through a configuration option to have a wake-up function.
2. Individual pins can be selected to have a pull-high resistor.
3. Pins PB2/AN2~PB3/AN3 exist but are not bonded out on the 16-pin package.
4. unbonded pins should be setup as outputs or as inputs with pull-high resistors to conserve power.
Rev. 1.41
3
December 30, 2008
HOLTEK [ HOLTEK SEMICONDUCTOR INC ]
