HT46R46/C46/R47/C47/R48/R49
A/D Programming Example
The following two programming examples illustrate how to setup and implement an A/D conversion. In the first exam-
ple, the method of polling the EOCB bit in the ADCR register is used to detect when the conversion cycle is complete,
whereas in the second example, the A/D interrupt is used to determine when the conversion is complete.
Example: using an EOCB polling method to detect the end of conversion for the HT46R46
clr EADI
mov a,00000001B
mov ACSR,a
; disable ADC interrupt
; setup the ACSR register to select fSYS/8 as
; the A/D clock
mov a,00100000B
mov ADCR,a
; setup ADCR register to configure Port PB0~PB3
; as A/D inputs
; and select AN0 to be connected to the A/D
; converter
:
:
; As the Port B channel bits have changed the
; following START
; signal (0-1-0) must be issued within 10
; instruction cycles
:
Start_conversion:
clr START
set START
clr START
Polling_EOC:
; reset A/D
; start A/D
sz
EOCB
; poll the ADCR register EOCB bit to detect end
; of A/D conversion
; continue polling
; read conversion result value from the ADR
; register
; save result to user defined memory
jmp polling_EOC
mov a,ADR
mov adr_buffer,a
:
:
jmp start_conversion
; start next A/D conversion
Rev. 1.00
31
April 18, 2007