HT46R23/HT46C23
Pad Name
I/O
Option
Description
Bidirectional 2-bit input/output port. Software instructions determine the
CMOS output, Schmitt trigger input with or without a pull-high resistor (de-
termined by pull-high option: port option). The PWM0/PWM1 output func-
tion are pin-shared with PD0/PD1 (dependent on PWM options).
PD0/PWM0
PD1/PWM1
Pull-high
I/O
I/O or PWM
RES
VDD
VSS
I
Schmitt trigger reset input. Active low.
Positive power supply
¾
¾
¾
¾
¾
Negative power supply, ground.
OSC1, OSC2 are connected to an RC network or a Crystal (determined by
options) for the internal system clock. In the case of RC operation, OSC2 is
the output terminal for 1/4 system clock.
OSC1
OSC2
I
Crystal
or RC
O
TEST1
TEST2
TEST3
TEST mode input pin.
I
¾
It disconnects in normal operation.
Absolute Maximum Ratings
Supply Voltage...........................VSS-0.3V to VSS+6.0V
Input Voltage..............................VSS-0.3V to VDD+0.3V
Storage Temperature............................-50°C to 125°C
Operating Temperature...........................-40°C to 85°C
Note: These are stress ratings only. Stresses exceeding the range specified under ²Absolute Maximum Ratings² may
cause substantial damage to the device. Functional operation of this device at other conditions beyond those
listed in the specification is not implied and prolonged exposure to extreme conditions may affect device reliabil-
ity.
D.C. Characteristics
Ta=25°C
Test Conditions
Conditions
Symbol
Parameter
Min.
Typ.
Max.
Unit
VDD
¾
f
f
SYS=4MHz
SYS=8MHz
2.2
3.3
¾
5.5
5.5
1.5
4
V
¾
¾
VDD
Operating Voltage
V
¾
3V
5V
3V
5V
0.6
2
mA
mA
mA
mA
Operating Current
(Crystal OSC)
No load, fSYS=4MHz
ADC disable
IDD1
¾
0.8
2.5
1.5
4
¾
Operating Current
(RC OSC)
No load, fSYS=4MHz
ADC disable
IDD2
IDD3
ISTB1
¾
No load, fSYS=8MHz
ADC disable
Operating Current
5V
3
5
mA
¾
3V
5V
3V
5V
5
10
1
¾
¾
¾
¾
¾
¾
¾
¾
mA
mA
mA
mA
Standby Current
(WDT Enabled)
No load, system HALT
No load, system HALT
Standby Current
(WDT Disabled)
ISTB2
2
Input Low Voltage for I/O Ports,
TMR and INT
VIL1
0.3VDD
0
V
V
¾
¾
¾
¾
¾
¾
Input High Voltage for I/O Ports,
TMR and INT
VIH1
0.7VDD
VDD
VIL2
VIH2
0.4VDD
VDD
Input Low Voltage (RES)
Input High Voltage (RES)
0
V
V
¾
¾
¾
¾
¾
¾
0.9VDD
Rev. 1.40
4
September 3, 2003
HOLTEK [ HOLTEK SEMICONDUCTOR INC ]
