HT46R14
The Table Higher-order byte register (TBLH) is read
only. The table pointer (TBLP) is a read/write register
(07H), which indicates the table location. Before ac-
cessing the table, the location must be placed in
TBLP. The TBLH is read only and cannot be restored.
If the main routine and the ISR (Interrupt Service Rou-
tine) both employ the table read instruction, the con-
tents of the TBLH in the main routine are likely to be
changed by the table read instruction used in the ISR.
Errors can occur. In other words, using the table read
instruction in the main routine and the ISR simulta-
neously should be avoided. However, if the table read
instruction has to be applied in both the main routine
and the ISR, the interrupt is supposed to be disabled
prior to the table read instruction. It will not be enabled
until the TBLH has been backed up. All table related
instructions require two cycles to complete the opera-
tion. These areas may function as normal program
memory depending upon the requirements.
0 0 0 H
0 0 4 H
0 0 8 H
0 0 C H
0 1 0 H
0 1 4 H
0 1 8 H
D e v ic e In itia liz a tio n P r o g r a m
E x te r n a l In te r r u p t 0 S u b r o u tin e
E x te r n a l In te r r u p t 1 S u b r o u tin e
C o m p a r a to r 0 In te r r u p t S u b r o u tin e
T im e r /E v e n t C o u n te r 0 In te r r u p t S u b r o u tin e
T im e r /E v e n t C o u n te r 1 In te r r u p t S u b r o u tin e
A /D C o n v e r te r In te r r u p t S u b r o u tin e
P ro g ra m
M e m o ry
data nor part of the program space, and is neither read-
able nor writeable. The activated level is indexed by the
stack pointer (SP) and is neither readable nor writeable.
At a subroutine call or interrupt acknowledgment, the
contents of the program counter are pushed onto the
stack. At the end of a subroutine or an interrupt routine,
signaled by a return instruction (RET or RETI), the pro-
gram counter is restored to its previous value from the
stack. After a chip reset, the SP will point to the top of the
stack.
If the stack is full and a non-masked interrupt takes
place, the interrupt request flag will be recorded but the
acknowledgment will be inhibited. When the stack
pointer is decremented (by RET or RETI), the interrupt
will be serviced. This feature prevents stack overflow al-
lowing the programmer to use the structure more easily.
In a similar case, if the stack is full and a
²CALL²
is sub-
sequently executed, stack overflow occurs and the first
entry will be lost (only the most recent 8 return ad-
dresses are stored).
Data Memory
-
RAM
The data memory is designed with 221´8 bits. The
data memory is divided into two functional groups: spe-
cial function registers and general purpose data mem-
ory (192´8). Most are read/write, but some are read
only.
The special function registers consist of an Indirect ad-
dressing register 0 (00H), a Memory pointer register 0
(MP0;01H), an Indirect addressing register 1 (02H), a
Memory pointer register 1 (MP1;03H), an Accumulator
(ACC;05H), a Program counter lower-order byte regis-
ter (PCL;06H), a Table pointer (TBLP;07H), a Table
higher-order byte register (TBLH;08H), a Status regis-
ter (STATUS;0AH), an Interrupt control register 0
(INTC0;0BH), a Timer/Event Counter 0 (TMR0;0DH), a
Timer/Event Counter 0 control register (TMR0C;0EH),
a Timer/Event Counter 1 (TMR1:10H), a Timer/Event
Counter 1 control register (TMR1C; 11H), Interrupt
control register 1 (INTC1;1EH) , the A/D result
lower-order byte register (ADRL;24H), the A/D result
higher-order byte register (ADRH;25H), the A/D control
register (ADCR;26H), the A/D clock setting register
(ACSR;27H), I/O registers (PA;12H, PB;14H, PC;16H)
and I/O control registers (PAC;13H, PBC;15H, PCC;
n 0 0 H
n F F H
L o o k - u p T a b le ( 2 5 6 w o r d s )
F F F H
L o o k - u p T a b le ( 2 5 6 w o r d s )
1 5 b its
N o te : n ra n g e s fro m
0 to F
Program Memory
Stack Register
-
STACK
This is a special part of the memory which is used to
save the contents of the program counter only. The
stack is organized into 8 levels and is neither part of the
Instruction
TABRDC [m]
TABRDL [m]
Table Location
*11
P11
1
*10
P10
1
*9
P9
1
*8
P8
1
*7
@7
@7
*6
@6
@6
*5
@5
@5
*4
@4
@4
*3
@3
@3
*2
@2
@2
*1
@1
@1
*0
@0
@0
Table Location
Note:
*11~*0: Table location bits
@7~@0: Table pointer bits
7
P11~P8: Current program counter bits
Rev. 1.00
November 1, 2005
HOLTEK [ HOLTEK SEMICONDUCTOR INC ]
