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HT46R0664_12 参数 Datasheet PDF下载

HT46R0664_12图片预览
型号: HT46R0664_12
PDF下载: 下载PDF文件 查看货源
内容描述: 增强A / DLCD型8位OTP MCU [Enhanced A/DLCD Type 8-Bit OTP MCU]
分类和应用:
文件页数/大小: 94 页 / 3850 K
品牌: HOLTEK [ HOLTEK SEMICONDUCTOR INC ]
 浏览型号HT46R0664_12的Datasheet PDF文件第4页浏览型号HT46R0664_12的Datasheet PDF文件第5页浏览型号HT46R0664_12的Datasheet PDF文件第6页浏览型号HT46R0664_12的Datasheet PDF文件第7页浏览型号HT46R0664_12的Datasheet PDF文件第9页浏览型号HT46R0664_12的Datasheet PDF文件第10页浏览型号HT46R0664_12的Datasheet PDF文件第11页浏览型号HT46R0664_12的Datasheet PDF文件第12页  
HT46R0664  
Enhanced A/D+LCD Type 8-Bit OTP MCU  
Pin Description  
Pin Name  
Function  
OPT  
I/T  
O/T  
CMOS  
Description  
PAPU  
PAWK  
Geneꢂal puꢂpose I/O. Registeꢂ enaꢁled pull-up and  
wake-up.  
PA0  
ST  
PA0/INT1/PWM0  
INT1  
ST  
Exteꢂnal inteꢂꢂupt input  
PWM0  
CTRL0  
CMOS PWM output  
PAPU  
PAWK  
Geneꢂal puꢂpose I/O. Registeꢂ enaꢁled pull-up and  
wake-up.  
PA1  
ST  
CMOS  
PA1/INTꢅ/TC1/  
[TC0]  
INTꢅ  
TC1  
TC0  
ST  
ST  
ST  
Exteꢂnal inteꢂꢂupt input  
Exteꢂnal Tiꢀeꢂ 1 �lo�k input  
Exteꢂnal Tiꢀeꢂ 0 �lo�k input  
PAPU  
PAWK  
Geneꢂal puꢂpose I/O. Registeꢂ enaꢁled pull-up and  
wake-up.  
PAꢅ  
ST  
CMOS  
PAꢅ/INT3/TC0/  
[TC1]  
INT3  
TC0  
TC1  
ST  
ST  
ST  
Exteꢂnal inteꢂꢂupt input  
Exteꢂnal Tiꢀeꢂ 0 �lo�k input  
Exteꢂnal Tiꢀeꢂ 1 �lo�k input  
PAPU  
PAWK  
Geneꢂal puꢂpose I/O. Registeꢂ enaꢁled pull-up and  
wake-up.  
PA3  
XTꢅ  
PAꢃ  
XT1  
PA5  
ST  
CMOS  
LXT  
PA3/XTꢅ  
PAꢃ/XT1  
CO  
Low fꢂequen�y �ꢂystal pin  
PAPU  
PAWK  
Geneꢂal puꢂpose I/O. Registeꢂ enaꢁled pull-up and  
wake-up.  
ST  
LXT  
ST  
CMOS  
CO  
Low fꢂequen�y �ꢂystal pin  
PAPU  
PAWK  
Geneꢂal puꢂpose I/O. Registeꢂ enaꢁled pull-up and  
wake-up.  
CMOS  
PA5/OSCꢅ/AN11  
PA6/OSC1/AN10  
OSCꢅ  
AN11  
CO  
OSC  
Os�illatoꢂ pin  
ANCSR1  
AN  
A/D �hannel 11  
PAPU  
PAWK  
Geneꢂal puꢂpose I/O. Registeꢂ enaꢁled pull-up and  
wake-up.  
PA6  
ST  
CMOS  
OSC1  
AN10  
PA7  
CO  
OSC  
AN  
ST  
ST  
Os�illatoꢂ pin  
ANCSR1  
PAWK  
PBPU  
A/D �hannel 10  
PA7  
NMOS Geneꢂal puꢂpose I/O. Registeꢂ enaꢁled wake-up.  
CMOS Geneꢂal puꢂpose I/O. Registeꢂ enaꢁled pull-up.  
CMOS PWM1 output  
PB0  
PB0/PWM1/AN3  
PWM1  
AN3  
CTRL0  
ANCSR0  
PBPU  
AN  
ST  
A/D �hannel 3  
PB1  
CMOS Geneꢂal puꢂpose I/O. Registeꢂ enaꢁled pull-up.  
CMOS Buzzeꢂ Output  
PB1/BUZ/ANꢅ  
PBꢅ/PFD/AN1  
BUZ  
CTRLꢅ  
ANCSR0  
PBPU  
ANꢅ  
AN  
ST  
A/D �hannel ꢅ  
PBꢅ  
CMOS Geneꢂal puꢂpose I/O. Registeꢂ enaꢁled pull-up.  
CMOS PFD output  
PFD  
CTRL0  
ANCSR0  
PBPU  
AN1  
AN  
ST  
AN  
ST  
A/D �hannel 1  
CMOS Geneꢂal puꢂpose I/O. Registeꢂ enaꢁled pull-up.  
A/D �hannel 0  
CMOS Geneꢂal puꢂpose I/O. Registeꢂ enaꢁled pull-up.  
COM LCD COM poꢂt  
CMOS Geneꢂal puꢂpose I/O. Registeꢂ enaꢁled pull-up.  
COM LCD COM poꢂt  
CMOS Geneꢂal puꢂpose I/O. Registeꢂ enaꢁled pull-up.  
COM LCD COM poꢂt  
CMOS Geneꢂal puꢂpose I/O. Registeꢂ enaꢁled pull-up.  
PB3  
PB3/AN0  
AN0  
ANCSR0  
PBPU  
PBꢃ  
PBꢃ/COM3  
PB5/COMꢅ  
PB6/COM1  
PB7/COM0  
COM3  
PB5  
LCDO  
PBPU  
ST  
COMꢅ  
PB6  
LCDO  
PBPU  
ST  
COM1  
PB7  
LCDO  
PBPU  
ST  
COM0  
LCDO  
COM  
LCD COM poꢂt  
Rev. 1.10  
8
De�eꢀꢁeꢂ 1ꢃꢄ ꢅ01ꢅ