HT46R064/065/066/0662/067
Ta=25°C
Test Conditions
Conditions
Symbol
Parameter
Min.
Typ.
Max.
Unit
VDD
5V
4
4
+2%
+5%
MHz
MHz
Ta=25°C, R=120kW *
Ta=0~70°C, R=120kW *
-2%
-5%
5V
System Clock
Ta= -40°C~85°C,
R=120kW *
fERC
5V
4
4
+7%
MHz
-7%
(ERC)
2.2V~ Ta= -40°C~85°C,
+11% MHz
-11%
5.5V
R=120kW *
fLXT
System Clock (LXT)
32768
¾
Hz
¾
¾
¾
¾
0
¾
2.2V~5.5V
3.0V~5.5V
4.5V~5.5V
4000
8000
kHz
kHz
Timer Input Frequency
(TCn)
fTIMER
0
¾
0
12000 kHz
¾
3V
5V
¾
5
10
15
19.5
¾
kHz
kHz
¾
¾
¾
fLIRC
LIRC Oscillator
6.5
1
13
tRES
External Reset Low Pulse Width
¾
ms
tSYS
tSYS
tSYS
For HXT/LXT
1024
2
¾
¾
¾
1
¾
tSST
System Start-up time Period
¾
¾
For ERC/IRC
(By configuration option)
1024
¾
¾
tINT
Interrupt Pulse Width
¾
¾
¾
¾
¾
¾
¾
ms
ms
ms
tLVR
Low Voltage Width to Reset
0.25
¾
1
2
RESTD Reset Delay Time
100
¾
Note: 1. tSYS=1/fSYS
2. *For fERC, as the resistor tolerance will influence the frequency a precision resistor is recommended.
3. For the HT46R065 devices, the fERC parameter is not applicable.
4. To maintain the accuracy of the internal HIRC oscillator frequency, a 0.1mF decoupling capacitor should
be connected between VDD and VSS and located as close to the device as possible.
Rev. 1.20
12
October 23, 2012
HOLTEK [ HOLTEK SEMICONDUCTOR INC ]
