HT46R01/HT46R02/HT46R03
·
Reset Initial Conditions
Low Voltage Reset - LVR
The microcontroller contains a low voltage reset cir-
cuit in order to monitor the supply voltage of the de-
vice. The LVR function is selected via a configuration
option. If the supply voltage of the device drops to
within a range of 0.9V~VLVR such as might occur when
changing the battery, the LVR will automatically reset
the device internally. For a valid LVR signal, a low sup-
ply voltage, i.e., a voltage in the range between
0.9V~VLVR must exist for a time greater than that spec-
ified by tLVR in the A.C. characteristics. If the low sup-
ply voltage state does not exceed this value, the LVR
will ignore the low supply voltage and will not perform
a reset function. The actual VLVR value can be se-
lected via configuration options.
The different types of reset described affect the reset
flags in different ways. These flags, known as PDF and
TO are located in the status register and are controlled
by various microcontroller operations, such as the
Power Down function or Watchdog Timer. The reset
flags are shown in the table:
TO PDF
RESET Conditions
0
u
1
1
0
u
u
1
RES reset during power-on
RES or LVR reset during normal operation
WDT time-out reset during normal operation
WDT time-out reset during Power Down
L
V
R
Note: ²u² stands for unchanged
t
R S T D
S
S
T
T
i
m
e
-
o
u
t
The following table indicates the way in which the vari-
ous components of the microcontroller are affected after
a power-on reset occurs.
I
n
t
e
r
n
a
l
R
e
s
e
t
Low Voltage Reset Timing Chart
Item
Condition After RESET
Program Counter Reset to zero
·
Watchdog Time-out Reset during Normal Operation
The Watchdog time-out Reset during normal opera-
tion is the same as a hardware RES pin reset except
that the Watchdog time-out flag TO will be set to ²1².
Interrupts
WDT
All interrupts will be disabled
Clear after reset, WDT begins
counting
W
D
T
T
i
m
e
-
o
u
t
Timer/Event
Counter
Timer Counter will be turned off
t
R S T D
S
S
T
T
i
m
e
-
o
u
t
The Timer Counter Prescaler will
be cleared
Prescaler
I
n
t
e
r
n
a
l
R
e
s
e
t
Input/Output Ports I/O ports will be setup as inputs
WDT Time-out Reset during Normal Operation
Timing Chart
Stack Pointer will point to the top
Stack Pointer
of the stack
·
Watchdog Time-out Reset during Power Down
The Watchdog time-out Reset during Power Down is
a little different from other kinds of reset. Most of the
conditions remain unchanged except that the Pro-
gram Counter and the Stack Pointer will be cleared to
²0² and the TO flag will be set to ²1². Refer to the A.C.
Characteristics for tSST details.
The different kinds of resets all affect the internal regis-
ters of the microcontroller in different ways. To ensure
reliable continuation of normal program execution after
a reset occurs, it is important to know what condition the
microcontroller is in after a particular reset occurs. The
following table describes how each type of reset affects
each of the microcontroller internal registers.
W
D
T
T
i
m
e
-
o
u
t
t
S
S
T
S
S
T
T
i
m
e
-
o
u
t
WDT Time-out Reset during Power Down
Timing Chart
Note:
That the SST can be enable (1024 clocks) or
disable (only 2 clock needed) by configuration
option if system clock is not from external crys-
tal.
Rev. 1.00
37
September 21, 2007
HOLTEK [ HOLTEK SEMICONDUCTOR INC ]
