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HT46CU66 参数 Datasheet PDF下载

HT46CU66图片预览
型号: HT46CU66
PDF下载: 下载PDF文件 查看货源
内容描述: A / D型8位微控制器与LCD [A/D Type 8-Bit MCU with LCD]
分类和应用: 微控制器
文件页数/大小: 63 页 / 489 K
品牌: HOLTEK [ HOLTEK SEMICONDUCTOR INC ]
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HT46RU66/HT46CU66  
Pin Description  
Configuration  
Option  
Pin Name  
I/O  
Description  
Bidirectional 8-bit input/output port. Each individual pin on this port can  
be configured as a wake-up input by a configuration option. Software in-  
structions determine if the pin is a CMOS output or Schmitt Trigger input.  
Configuration options determine which pins on the port have pull-high  
resistors. Pins PA0, PA1 and PA3 are pin-shared with BZ, BZ and PFD  
respectively, the function of which is chosen via configuration options.  
PA0/BZ  
Pull-high  
Wake-up  
Buzzer  
PFD  
PA1/BZ  
PA2  
I/O  
PA3/PFD  
PA4~PA7  
Bidirectional 8-bit input/output port. Software instructions determine if  
the pin is a CMOS output or Schmitt Trigger input. Configuration options  
determine which pins on the port have pull-high resistors. PB is  
pin-shared with the A/D input pins. The A/D inputs are selected via soft-  
ware instructions. Once selected as an A/D input, the I/O function and  
pull-high resistor functions are disabled automatically.  
PB0/AN0~  
PB7/AN7  
I/O  
I/O  
Pull-high  
Pull-high  
Bidirectional 8-bit input/output port. Software instructions determine if  
the pin is a CMOS output or Schmitt Trigger input. A Configuration option  
determines if the port has pull-high resistors. Pin PC0 is pin-shared with  
the timer input pin TMR2. Pins PC6 and PC7 are pin-shared with the  
UART pins TX and RX.  
PC0/TMR2  
PC1~PC5  
PC6/TX  
PC7/RX  
Bidirectional 8-bit input/output port. Software instructions determine if  
the pin is a CMOS output or Schmitt Trigger input. Configuration options  
determine which pins on the port have pull-high resistors. PD0~PD3 are  
pin-shared with PWM0~PWM3, the function of each pin is selected via a  
configuration option. Pins PD4 and PD5 are pin-shared with external in-  
terrupt input pins INT0 and INT1 respectively. Configuration options de-  
termine the interrupt enable/disable and the interrupt low/high trigger  
type. Pins PD6 and PD7 are pin-shared with the external timer input pins  
TMR0 and TMR1 respectively.  
PD0/PWM0  
PD1/PWM1  
PD2/PWM2  
PD3/PWM3  
PD4/INT0  
Pull-high  
PWM  
I/O  
Interrupt  
PD5/INT1  
PD6/TMR0  
PD7/TMR1  
OSC1 and OSC2 are connected to an external RC network or external  
crystal, determined by configuration option, for the internal system clock.  
For external RC system clock operation, OSC2 is an output pin where  
the system frequency can be monitored, at a frequency of 1/4 system  
clock. If an RTC oscillator on pins OSC3 and OSC4 is used as a system  
clock, then the OSC1 and OSC2 pins should be left floating.  
OSC1  
OSC2  
I
Crystal or RC  
O
OSC3  
OSC4  
I
RTC or  
OSC3 and OSC4 are connected to a 32768Hz crystal to form a real time  
clock for timing purposes or to form a system clock.  
O
System Clock  
VLCD  
LCD power supply  
¾
¾
IC maximum voltage, connect to VDD, VLCD or V1  
LCD voltage pump  
VMAX  
¾
¾
¾
V1, V2, C1, C2  
I
LCD driver outputs for LCD panel segments. A configuration option can  
select all pins to be used as segment drivers or all pins to be used as  
CMOS outputs.  
SEG0~SEG7 or  
CMOS output  
SEG0~SEG7  
SEG8~SEG15  
O
O
LCD driver outputs for LCD panel segments. A configuration option can  
select all pins to be used as segment drivers or all pins to be used as  
CMOS outputs.  
SEG8~SEG15 or  
CMOS output  
LCD driver outputs for LCD panel segments. Configuration options can  
select each pin to be used as either a segment driver or each pin to be  
used as a CMOS output.  
SEG16~SEG23  
CMOS output  
SEG16~SEG23  
SEG24~SEG45  
O
O
O
LCD driver outputs for LCD panel segments  
¾
An LCD duty-cycle configuration option determines if SEG46 is config-  
ured as a segment driver or as a common output driver for the LCD  
panel. COM0~COM2 are the LCD common outputs.  
COM0~COM2  
COM3/SEG46  
1/3 or 1/4 Duty  
COM3 or SEG46  
Rev. 1.20  
4
October 2, 2007