HT45RM03 参数 Datasheet PDF下载

HT45RM03

Pad Description

Pad Name

I/O

Option

Description

Bidirectional 8-bit input/output port. Each bit can be configured as

wake-up input by ROM code option. Software instructions determine

the CMOS output or Schmitt trigger input with or without pull-high resis-

tor (determined by pull-high options: bit option). The INT0A, INT0B,

INT0C and INT1 are pin-shared with PA4~PA7.

The CVINP, CVINN and COUT are pin-shared with PA1, PA2 and PA3.

Once the Comparator function is used, the internal registers related to

PA1, PA2 cannot be used, PA3 can be used as input only, and the PA1,

PA2 I/O function and pull-high resistor are disabled automatically. Soft-

ware instructions determine the Comparator function to be used.

The OPVINP is pin-shared with PA0.

Bidirectional 8-bit input/output port. Software instructions determine the

CMOS output, Schmitt trigger input with or without pull-high resistor

(determined by pull-high option: bit option) or A/D input. Once a PB line

is selected as an A/D input (by using software control), the I/O function

and pull-high resistor are disabled automatically.

The OPVINP, OPVINN and OPOUT are pin-shared with PA0, PB3/AN3

and PB2/AN2 respectively. Once the OPA function is used, the internal

registers related to PA0, PB3 and PB2 cannot be used, and the I/O

function and pull-high resistor are disabled automatically. Software in-

structions determine the OPA function to be used.

Bidirectional 6-bit input/output port. Software instructions determine the

CMOS output, Schmitt trigger input with or without a pull-high resistor

(determined by pull-high option: byte option). The PWM0~PWM2 and

PWM0~PWM2 output function are pin-shared with PC0, PC2, PC4 and

PC1, PC3, PC5 respectively by software control.

Bidirectional 1-bit input/output port. Software instructions determine the

CMOS output, Schmitt trigger input with or without a pull-high resistor

(determined by pull-high option: bit option). The PFD output function is

pin-shared with PD0.

Schmitt trigger reset input. Active low.

Positive power supply

Negative power supply, ground.

OSC1, OSC2 are connected to an RC network or a Crystal (determined

by options) for the internal system clock. In the case of RC operation,

OSC2 is the output terminal for 1/4 system clock.

PA0/OPVINP

PA1/CVINP

PA2/CVINN

PA3/COUT

PA4/INT0A

PA5/INT0B

PA6/INT0C

PA7/INT1

I/O

Wake-up

Pull-high

PB0/AN0

PB1/AN1

PB2/AN2/OPOUT

I/O

PB3/AN3/OPVINN

PB4/AN4~PB6/AN6

PB7/AN7/TMR0/TMR1

Pull-high

PC0/PWM0

PC1/PWM0

PC2/PWM1

PC3/PWM1

PC4/PWM2

PC5/PWM2

I/O

Pull-high

PD0/PFD

I/O

Pull-high

PFD

¾

¾

¾

Crystal

or RC

RES

VDD

VSS

OSC1

OSC2

I

¾

¾

I

O

Absolute Maximum Ratings

Supply Voltage ...........................V

SS

-0.3V

to V

SS

+6.0V

Input Voltage..............................V

SS

-0.3V

to V

DD

+0.3V

I

OL

Total ..............................................................150mA

Total Power Dissipation .....................................500mW

Storage Temperature ............................-50°C to 125°C

Operating Temperature...........................-40°C to 85°C

I

OH

Total............................................................-100mA

Note: These are stress ratings only. Stresses exceeding the range specified under

²Absolute

Maximum Ratings² may

cause substantial damage to the device. Functional operation of this device at other conditions beyond those

listed in the specification is not implied and prolonged exposure to extreme conditions may affect device reliabil-

ity.

Rev. 1.10

3

February 16, 2007