HT45R06
Pin Description
Pin Name
PA0~PA2
PA3/PFD
PA4/TMR
PA5/INT
PA6~PA7
PB0/AN0~
PB3/AN3
I/O
Option
Pull-high
Wake-up
PFD
Description
I/O lines with pull-high resistors (bit option). I/O modes of each line are controlled
by related control register bit (PAC).
Each line of PA can be optioned as a wake-up input (bit option).
I/O configurations: Schmitt trigger/CMOS.
The PA3, PA4 and PA5 are pin-shared with PFD, TMR and INT, respectively.
I/O lines with pull-high resistors (bit option).
I/O modes of each line are controlled by related control register bit (PBC).
I/O configurations: Schmitt trigger/CMOS.
Each PB line is pin shared with an A/D converter input.
I/O lines with pull-high resistors (bit option).
I/O modes of each line are controlled by related control register bit (PDC).
I/O configurations: Schmitt trigger/CMOS.
A resistor connected across OSC1 and VSS or a crystal across OSC1 and OSC2
will generate the system clock.
Schmitt trigger reset input. Active low.
Positive power supply
Negative power supply, ground.
I/O
I/O
Pull-high
PD0
OSC1
OSC2
RES
VDD
VSS
I/O
I
O
¾
¾
¾
Pull-high
Crystal
or RC
¾
¾
¾
Note: All pull-high resistors are controlled by an option bit.
Absolute Maximum Ratings
Supply Voltage ...........................V
SS
-0.3V
to V
SS
+6.0V
Input Voltage..............................V
SS
-0.3V
to V
DD
+0.3V
Storage Temperature ............................-50°C to 125°C
Operating Temperature...........................-40°C to 85°C
Note: These are stress ratings only. Stresses exceeding the range specified under
²Absolute
Maximum Ratings² may
cause substantial damage to the device. Functional operation of this device at other conditions beyond those
listed in the specification is not implied and prolonged exposure to extreme conditions may affect device reliabil-
ity.
Rev. 1.00
3
May 24, 2005