HT45F4N/HT45FH4N
Power Bank Flash MCU
Pin Name
Function
OPT
I/T
O/T
Description
PAPU
PAWU
Geneꢂal puꢂpose I/O. Registeꢂ enaꢁled pull-up and
wake-up.
PAꢆ
ST
CMOS
INTEG
INTC1
INT1
ST
—
—
Exteꢂnal inteꢂꢂupt 1
TM3 �lo�k input
TCK3
—
ST
ST
PAꢆ/INT1/TCK3/
TPꢅ_1/AN3/
TPꢅ_1
TMPC1
CMOS TMꢅ I/O
ICPDA/OCDSDA
ACERL
ADCR0
AN3
AN
ST
ST
—
ADC input
ICPDA
—
CMOS In-�iꢂ�uit pꢂogꢂaꢀꢀing data/addꢂess pin
On-�hip deꢁug suppoꢂt data/addꢂess pinꢄ foꢂ EV �hip
OCDSDA
—
CMOS
only.
PAPU
PAWU
Geneꢂal puꢂpose I/O. Registeꢂ enaꢁled pull-up and
wake-up.
PA7
ST
CMOS
INTEG
INTC1
INTꢅ
TP1_1
ANꢃ
ST
ST
AN
—
Exteꢂnal inteꢂꢂupt ꢅ
PA7/INTꢅ/TP1_1/
ANꢃ/ICPCK/
OCDSCK
TMPC0
CMOS TM1 I/O
ACERL
ADCR0
—
ADC input
ICPCK
OCDSCK
PB0
—
ST
ST
ST
ST
ST
ST
ST
—
—
In-�iꢂ�uit pꢂogꢂaꢀꢀing �lo�k pin
—
On-�hip deꢁug suppoꢂt �lo�k pinꢄ foꢂ EV �hip only.
PBPU
TMPC0
TMPC0
TMPC1
TMPC1
CMOS Geneꢂal puꢂpose I/O. Registeꢂ enaꢁled pull-up
CMOS TM0 I/O
TP0_0
TP1_0
TPꢅ_0
TP3_0
CMOS TM1 I/O
PB0/TP0_0/TP1_0/
TPꢅ_0/TP3_0/
[OUT1L]/SCOM0
CMOS TMꢅ I/O
CMOS TM3 I/O
PRM
TMPC1
OUT1L
—
CMOS Coꢀpleꢀentaꢂy PWM 1 output
SCOM0 SCOMC
—
SCOM Softwaꢂe �ontꢂolled LCD COM
PB1
PBPU
ST
CMOS Geneꢂal puꢂpose I/O. Registeꢂ enaꢁled pull-up
PRM
TMPC0
PB1/[OUT0L]/
OUT1L
OUT0L
—
CMOS Coꢀpleꢀentaꢂy PWM0 output
PRM
TMPC1
OUT1L
PBꢅ
—
ST
—
CMOS Coꢀpleꢀentaꢂy PWM1 output
PBPU
CMOS Geneꢂal puꢂpose I/O. Registeꢂ enaꢁled pull-up.
CMOS Coꢀpleꢀentaꢂy PWM0 output
PRM
TMPC0
PBꢅ/[OUT0H]/
OUT1H
OUT0H
PRM
TMPC1
OUT1H
PB3
—
ST
—
CMOS Coꢀpleꢀentaꢂy PWM 1 output
PBPU
CMOS Geneꢂal puꢂpose I/O. Registeꢂ enaꢁled pull-up.
CMOS Coꢀpleꢀentaꢂy PWM0 output
PB3/OUT0H
PBꢃ/OUT0L
PRM
TMPC0
OUT0H
PBꢃ
PBPU
ST
—
CMOS Geneꢂal puꢂpose I/O. Registeꢂ enaꢁled pull-up.
CMOS Coꢀpleꢀentaꢂy PWM0 output
PRM
TMPC0
OUT0L
PC0
PCPU
ST
AN
CMOS Geneꢂal puꢂpose I/O. Registeꢂ enaꢁled pull-up.
ACERL
OUVPC0
OUVP00
—
—
Oveꢂ/undeꢂ voltage pꢂote�tion input
ADC input
PC0/OUVP00/AN5
ACERL
ADCR0
AN5
AN
Rev. 1.30
1ꢅ
De�eꢀꢁeꢂ 1ꢃꢄ ꢅ01ꢆ