HT45F23A
8-Bit Flash MCU with Op Amps & Comparators
Pin Assignment
2
1
1
1
1
1
1
1
1
1
0
9
8
7
6
5
4
3
2
1
P
1
A
C
/
O
1
T
U
/
0
T
C
V
V
P
P
P
P
P
P
P
P
D
D
S
A
A
A
A
A
A
B
B
1
2
3
4
5
6
7
8
9
1
P
0
A
C
/
N
/
P
C
S
M
O
0
S
2
3
4
5
6
7
0
1
P
3
C
X
/
2
1
T
A
A
A
A
A
A
S
S
/
/
/
/
/
/
/
/
1
1
1
2
2
2
D
ID S / AD
C
P
O
D
T
2
/
T
U
V
D
D
V
P
P
P
P
P
P
P
S
2
3
4
5
6
7
3
S
A
A
A
A
A
A
B
1
2
3
4
5
6
7
8
1
1
1
1
1
1
1
6
5
4
3
2
1
0
P
2
C
X
/
T
N
/
I
T
N
0
P
1
A
C
/
O
1
T
U
/
0
T
C
A
A
A
A
A
A
A
/
/
/
/
/
/
/
1
1
1
2
2
2
0N S / SC
C
P
O
2
/
T
U
P
1
C
A
/
5
N
O
/
C
S
1
2
T
P
E
P
1
C
/
/
P
0
A
C
/
P
N
S
/
O
C
M
0
2
1
N
I
/
T
N
0
P
0
C
A
/
4
N
O
/
C
S
F
P
P
3
C
X
/
T
T
P
E
P
1
C
/
/
P
6
B
A
/
3
N
R
/
/
/
S
K
S
E
N
B
/
Z
2
C
X
/
T
D
F
P
4
B
A
/
1
N
A
/
D
U
P
C
B
/
E
Z
/
P
1
C
A
/
5
4
N
O
/
C
S
1
N
B
/
Z
P
P
3
2
B
B
A
S
/
/
0
N
C
S
C
O
I
N
1
P
0
C
A
/
N
O
/
C
S
2
B
E
Z
/
K
/
L
S
C
P
6
B
A
/
3
N
R
/
S
E
9
0
1
6
N
O
S
-
P
A
2
0
S
S
-
O
A
P
1
2
3
4
5
6
7
8
9
1
1
1
P
6
C
P
/
W
M
/
1
2
C
/
P
C
S
M
O
3
2
P
V
V
P
P
P
P
P
P
P
P
P
1
A
D
S
A
A
A
A
A
A
B
B
B
C
/
O
1
T
U
/
0
T
C
2
2
2
2
2
1
1
1
1
1
1
1
4
3
2
1
0
9
8
7
6
5
4
3
P
5
C
P
/
W
M
/
0
1
C
/
N
C
S
M
O
D
P
4
C
V
/
E
R
/
F
C
V
P
P
A
/
/
O
S
M
M
1
C
S
2
3
4
5
6
7
0
1
2
P
0
A
C
/
N
S
O
C
0
2
1
A
A
A
A
A
A
S
S
S
/
/
/
/
/
/
/
/
/
1
1
1
2
2
2
D
D
C
C
P
O
D
T
2
/
T
U
P
3
C
X
/
T
N
I
/
T
N
0
P
2
C
X
/
T
T
P
E
P
1
C
/
/
P
1
C
A
/
5
4
N
O
/
C
S
1
2
F
P
0
C
A
/
N
O
/
C
S
N
B
/
Z
P
6
B
A
/
3
N
R
/
S
E
B
/
E
Z
/
P
5
B
A
/
2
N
P
/
N
I
T
0
1
2
O
I
K
I
N
1
P
4
B
A
/
1
N
A
/
D
U
P
S
/
K
C
/
D
S
A
P
3
B
A
/
0
N
/
S
C
/
L
S
C
2
4
S
S
-
O
A
P
Pin Description
Pin Name
Function
OPT
I/T
O/T
Description
PAPU
PAWU
PA0
ST CMOS Generaꢁ pꢀrpose I/O. Register enabꢁed pꢀꢁꢁ-ꢀpꢄ wake-ꢀp.
PA0/CNP/
CNP
CMP1C1 CMPI
—
Comparator inpꢀt pin
SCOM0
SCOM0
LCDC
—
SCOM Software controꢁꢁed 1/ꢅ bias LCD COM
PAPU
PAWU
PA1
ST CMOS Generaꢁ pꢀrpose I/O. Register enabꢁed pꢀꢁꢁ-ꢀpꢄ wake-ꢀp.
PA1/C1OUT/
TC0
C1OUT CMP1C1
—
CMPO Comparator 1 oꢀtpꢀt pin
Externaꢁ Timer 0 cꢁock inpꢀt
TC0
PAꢅ
A1P
—
ST
—
PAPU
PAWU
ST CMOS Generaꢁ pꢀrpose I/O. Register enabꢁed pꢀꢁꢁ-ꢀpꢄ wake-ꢀp.
PAꢅ/A1P/
CꢅOUT
OPA1C1 OPAI
—
OPA1 non-inverting inpꢀt pin
CꢅOUT CMPꢅC1
—
CMPO Comparator ꢅ oꢀtpꢀt pin
PAPU
PAꢃ
Generaꢁ pꢀrpose I/O. Register enabꢁed pꢀꢁꢁ-ꢀpꢄ
wake-ꢀp.
ST CMOS
—
PAWU
PAꢃ/A1N/INT0
A1N
OPA1C1 OPAI
OPA1 inverting inpꢀt pin
INT0
—
ST
—
Externaꢁ interrꢀpt 0 inpꢀt pin
PAPU
PAWU
PA4
ST CMOS Generaꢁ pꢀrpose I/O. Register enabꢁed pꢀꢁꢁ-ꢀp and wake-ꢀp.
PA4/A1E/TC1
Rev. 1.00
A1E
TC1
OPA1C1
—
—
OPAO OPA1 oꢀtpꢀt pin
Externaꢁ Timer 1 cꢁock inpꢀt
ST
—
11
�ꢀꢁꢂ 0ꢃꢄ ꢅ01ꢅ