HT45B0F
Bit 1
Bit 0
RX8: Receive data bit 8 for 9-bit data transfer format (read only)
This bit is only used if 9-bit data transfers are used, in which case this bit location will store the
9th bit of the received data known as RX8. The BNO bit is used to determine whether data
transfers are in 8-bit or 9-bit format.
TX8: Transmit data bit 8 for 9-bit data transfer format (write only)
This bit is only used if 9-bit data transfers are used, in which case this bit location will store the
9th bit of the transmitted data known as TX8. The BNO bit is used to determine whether data
transfers are in 8-bit or 9-bit format.
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UCR2 register
The UCR2 register is the second of the UART control registers and serves several purposes. One of its main func-
tions is to control the basic enable/disable operation if the UART Transmitter and Receiver as well as enabling the
various UART interrupt sources. The register also serves to control the baud rate speed, receiver wake-up function
enable and the address detect function enable. Further explanation on each of the bits is given below:
Bit
Name
R/W
7
TXEN
R/W
0
6
RXEN
R/W
0
5
BRGH
R/W
0
4
ADDEN
R/W
0
3
WAKE
R/W
1
2
RIE
R/W
0
1
TIIE
R
0
TEIE
W
POR
1
1
Bit 7
TXEN: UART Transmitter enable control
0: UART transmitter is disabled
1: UART transmitter is enabled
The bit named TXEN is the Transmitter Enable Bit. When this bit is equal to ²0², the transmitter
will be disabled with any pending data transmissions being aborted. In addition the buffers will be
reset. In this situation the TX pin will be in the state of high impedance. If the TXEN bit is equal to
²1² and the UARTEN bit is also equal to ²1², the transmitter will be enabled and the TX pin will
be controlled by the UART. Clearing the TXEN bit during a transmission will cause the data
transmission to be aborted and will reset the transmitter. If this situation occurs, the TX pin will
be in the state of high impedance.
Bit 6
RXEN: UART Receiver enable control
0: UART receiver is disabled
1: UART receiver is enabled
The bit named RXEN is the Receiver Enable Bit. When this bit is equal to ²0², the receiver will
be disabled with any pending data receptions being aborted. In addition the receive buffers will
be reset. In this situation the RX pin will be in the state of high impedance. If the RXEN bit is
equal to ²1² and the UARTEN bit is also equal to ²1², the receiver will be enabled and the RX pin
will be controlled by the UART. Clearing the RXEN bit during a reception will cause the data
reception to be aborted and will reset the receiver. If this situation occurs, the RX pin will be in the
state of high impedance.
Bit 5
BRGH: Baud Rate speed selection
0: low speed baud rate
1: high speed baud rate
The bit named BRGH selects the high or low speed mode of the Baud Rate Generator. This bit,
together with the value placed in the baud rate register BRG, controls the Baud Rate of the
UART. If this bit is equal to ²1², the high speed mode is selected. If the bit is equal to ²0²,
the low speed mode is selected.
Bit 4
ADDEN: Address detect function enable control
0: address detect function is disabled
1: address detect function is enabled
The bit named ADDEN is the address detect function enable control bit. When this bit is equal to
²1², the address detect function is enabled. When it occurs, if the 8th bit, which corresponds to
RX7 if BNO=0 or the 9th bit, which corresponds to RX8 if BNO=1, has a value of ²1²,
then the received word will be identified as an address, rather than data. If the corresponding
interrupt is enabled, an interrupt request will be generated each time the received word has the
address bit set, which is the 8th or 9th bit depending on the value of BNO. If the address bit
known as the 8th or 9th bit of the received word is ²0² with the address detect function being
enabled, an interrupt will not be generated and the received data will be discarded.
Rev. 1.10
10
September 24, 2012